[SubZero] Fix code generation issues occurred in Cross-test and PNaCL smoke-tests

src/IceInstMIPS32.h

 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 11 matching lines @@
 #include "IceConditionCodesMIPS32.h"
 #include "IceDefs.h"
 #include "IceInst.h"
 #include "IceInstMIPS32.def"
 #include "IceOperand.h"
 
 namespace Ice {
 namespace MIPS32 {
 
 enum RelocOp { RO_No, RO_Hi, RO_Lo, RO_Jal };
+enum Int64Part { Int64_Hi, Int64_Lo };
 
 inline void emitRelocOp(Ostream &Str, RelocOp Reloc) {
   switch (Reloc) {
   default:
     break;
   case RO_Hi:
     Str << "%hi";
     break;
   case RO_Lo:
     Str << "%lo";
@@ skipping 183 matching lines @@
     Label,
     Ldc1,
     Ll,
     Lui,
     Lw,
     Lwc1,
     Mfc1,
     Mfhi,
     Mflo,
     Mov, // actually a pseudo op for addi rd, rs, 0
+    Mov_fp,
     Mov_d,
     Mov_s,
     Movf,
     Movn,
     Movn_d,
     Movn_s,
     Movt,
     Movz,
     Movz_d,
     Movz_s,
@@ skipping 1068 matching lines @@
 private:
   InstMIPS32Mov(Cfg *Func, Variable *Dest, Operand *Src, Operand *Src2);
 
   void emitMultiDestSingleSource(const Cfg *Func) const;
   void emitSingleDestMultiSource(const Cfg *Func) const;
   void emitSingleDestSingleSource(const Cfg *Func) const;
 
   Variable *DestHi = nullptr;
 };
 
+/// Handle double to i64 move
+class InstMIPS32MovFP64ToI64 final : public InstMIPS32 {
+  InstMIPS32MovFP64ToI64() = delete;
+  InstMIPS32MovFP64ToI64(const InstMIPS32MovFP64ToI64 &) = delete;
+  InstMIPS32MovFP64ToI64 &operator=(const InstMIPS32MovFP64ToI64 &) = delete;
+
+public:
+  static InstMIPS32MovFP64ToI64 *create(Cfg *Func, Variable *Dest, Operand *Src,
+                                        Int64Part Int64HiLo) {
+    return new (Func->allocate<InstMIPS32MovFP64ToI64>())
+        InstMIPS32MovFP64ToI64(Func, Dest, Src, Int64HiLo);
+  }
+
+  bool isRedundantAssign() const override {
+    return checkForRedundantAssign(getDest(), getSrc(0));
+  }
+
+  void dump(const Cfg *Func) const override {
+    if (!BuildDefs::dump())
+      return;
+    Ostream &Str = Func->getContext()->getStrDump();
+    getDest()->dump(Func);
+    Str << " = ";
+    dumpOpcode(Str, "mov_fp", getDest()->getType());
+    Str << " ";
+    getSrc(0)->dump(Func);
+  }
+
+  Int64Part getInt64Part() const { return Int64HiLo; }
+
+  static bool classof(const Inst *Inst) { return isClassof(Inst, Mov_fp); }
+
+private:
+  InstMIPS32MovFP64ToI64(Cfg *Func, Variable *Dest, Operand *Src,
+                         Int64Part Int64HiLo);
+  const Int64Part Int64HiLo;
+};
+
 // Declare partial template specializations of emit() methods that already have
 // default implementations. Without this, there is the possibility of ODR
 // violations and link errors.
 
 template <> void InstMIPS32Abs_d::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Abs_s::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Add_d::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Add_s::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Addi::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Addiu::emitIAS(const Cfg *Func) const;
@@ skipping 85 matching lines @@
 template <> void InstMIPS32Trunc_l_s::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Trunc_w_d::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Trunc_w_s::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Xor::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const;
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTMIPS32_H