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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <stdarg.h> | 5 #include <stdarg.h> |
6 #include <stdlib.h> | 6 #include <stdlib.h> |
7 #include <cmath> | 7 #include <cmath> |
8 | 8 |
9 #if V8_TARGET_ARCH_PPC | 9 #if V8_TARGET_ARCH_PPC |
10 | 10 |
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3288 if (instr->Bit(0)) { // RC bit set | 3288 if (instr->Bit(0)) { // RC bit set |
3289 SetCR0(result); | 3289 SetCR0(result); |
3290 } | 3290 } |
3291 return; | 3291 return; |
3292 } | 3292 } |
3293 } | 3293 } |
3294 UNIMPLEMENTED(); // Not used by V8. | 3294 UNIMPLEMENTED(); // Not used by V8. |
3295 } | 3295 } |
3296 #endif | 3296 #endif |
3297 | 3297 |
| 3298 void Simulator::ExecuteExt6(Instruction* instr) { |
| 3299 switch (instr->Bits(10, 3) << 3) { |
| 3300 case XSADDDP: { |
| 3301 int frt = instr->RTValue(); |
| 3302 int fra = instr->RAValue(); |
| 3303 int frb = instr->RBValue(); |
| 3304 double fra_val = get_double_from_d_register(fra); |
| 3305 double frb_val = get_double_from_d_register(frb); |
| 3306 double frt_val = fra_val + frb_val; |
| 3307 set_d_register_from_double(frt, frt_val); |
| 3308 return; |
| 3309 } |
| 3310 case XSSUBDP: { |
| 3311 int frt = instr->RTValue(); |
| 3312 int fra = instr->RAValue(); |
| 3313 int frb = instr->RBValue(); |
| 3314 double fra_val = get_double_from_d_register(fra); |
| 3315 double frb_val = get_double_from_d_register(frb); |
| 3316 double frt_val = fra_val - frb_val; |
| 3317 set_d_register_from_double(frt, frt_val); |
| 3318 return; |
| 3319 } |
| 3320 case XSMULDP: { |
| 3321 int frt = instr->RTValue(); |
| 3322 int fra = instr->RAValue(); |
| 3323 int frb = instr->RBValue(); |
| 3324 double fra_val = get_double_from_d_register(fra); |
| 3325 double frb_val = get_double_from_d_register(frb); |
| 3326 double frt_val = fra_val * frb_val; |
| 3327 set_d_register_from_double(frt, frt_val); |
| 3328 return; |
| 3329 } |
| 3330 case XSDIVDP: { |
| 3331 int frt = instr->RTValue(); |
| 3332 int fra = instr->RAValue(); |
| 3333 int frb = instr->RBValue(); |
| 3334 double fra_val = get_double_from_d_register(fra); |
| 3335 double frb_val = get_double_from_d_register(frb); |
| 3336 double frt_val = fra_val / frb_val; |
| 3337 set_d_register_from_double(frt, frt_val); |
| 3338 return; |
| 3339 } |
| 3340 } |
| 3341 UNIMPLEMENTED(); // Not used by V8. |
| 3342 } |
3298 | 3343 |
3299 void Simulator::ExecuteGeneric(Instruction* instr) { | 3344 void Simulator::ExecuteGeneric(Instruction* instr) { |
3300 int opcode = instr->OpcodeValue() << 26; | 3345 int opcode = instr->OpcodeValue() << 26; |
3301 switch (opcode) { | 3346 switch (opcode) { |
3302 case SUBFIC: { | 3347 case SUBFIC: { |
3303 int rt = instr->RTValue(); | 3348 int rt = instr->RTValue(); |
3304 int ra = instr->RAValue(); | 3349 int ra = instr->RAValue(); |
3305 intptr_t ra_val = get_register(ra); | 3350 intptr_t ra_val = get_register(ra); |
3306 int32_t im_val = instr->Bits(15, 0); | 3351 int32_t im_val = instr->Bits(15, 0); |
3307 im_val = SIGN_EXT_IMM16(im_val); | 3352 im_val = SIGN_EXT_IMM16(im_val); |
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3803 int64_t rs_val = get_register(rs); | 3848 int64_t rs_val = get_register(rs); |
3804 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0) & ~3); | 3849 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0) & ~3); |
3805 WriteDW(ra_val + offset, rs_val); | 3850 WriteDW(ra_val + offset, rs_val); |
3806 if (instr->Bit(0) == 1) { // This is the STDU form | 3851 if (instr->Bit(0) == 1) { // This is the STDU form |
3807 DCHECK(ra != 0); | 3852 DCHECK(ra != 0); |
3808 set_register(ra, ra_val + offset); | 3853 set_register(ra, ra_val + offset); |
3809 } | 3854 } |
3810 break; | 3855 break; |
3811 } | 3856 } |
3812 #endif | 3857 #endif |
| 3858 case EXT6: { |
| 3859 ExecuteExt6(instr); |
| 3860 break; |
| 3861 } |
3813 | 3862 |
3814 default: { | 3863 default: { |
3815 UNIMPLEMENTED(); | 3864 UNIMPLEMENTED(); |
3816 break; | 3865 break; |
3817 } | 3866 } |
3818 } | 3867 } |
3819 } // NOLINT | 3868 } // NOLINT |
3820 | 3869 |
3821 | 3870 |
3822 void Simulator::Trace(Instruction* instr) { | 3871 void Simulator::Trace(Instruction* instr) { |
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4081 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); | 4130 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); |
4082 uintptr_t address = *stack_slot; | 4131 uintptr_t address = *stack_slot; |
4083 set_register(sp, current_sp + sizeof(uintptr_t)); | 4132 set_register(sp, current_sp + sizeof(uintptr_t)); |
4084 return address; | 4133 return address; |
4085 } | 4134 } |
4086 } // namespace internal | 4135 } // namespace internal |
4087 } // namespace v8 | 4136 } // namespace v8 |
4088 | 4137 |
4089 #endif // USE_SIMULATOR | 4138 #endif // USE_SIMULATOR |
4090 #endif // V8_TARGET_ARCH_PPC | 4139 #endif // V8_TARGET_ARCH_PPC |
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