| OLD | NEW |
| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
| (...skipping 1086 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1097 RCBit rc = LeaveRC); | 1097 RCBit rc = LeaveRC); |
| 1098 void fabs(const DoubleRegister frt, const DoubleRegister frb, | 1098 void fabs(const DoubleRegister frt, const DoubleRegister frb, |
| 1099 RCBit rc = LeaveRC); | 1099 RCBit rc = LeaveRC); |
| 1100 void fmadd(const DoubleRegister frt, const DoubleRegister fra, | 1100 void fmadd(const DoubleRegister frt, const DoubleRegister fra, |
| 1101 const DoubleRegister frc, const DoubleRegister frb, | 1101 const DoubleRegister frc, const DoubleRegister frb, |
| 1102 RCBit rc = LeaveRC); | 1102 RCBit rc = LeaveRC); |
| 1103 void fmsub(const DoubleRegister frt, const DoubleRegister fra, | 1103 void fmsub(const DoubleRegister frt, const DoubleRegister fra, |
| 1104 const DoubleRegister frc, const DoubleRegister frb, | 1104 const DoubleRegister frc, const DoubleRegister frb, |
| 1105 RCBit rc = LeaveRC); | 1105 RCBit rc = LeaveRC); |
| 1106 | 1106 |
| 1107 // Support for VSX instructions |
| 1108 |
| 1109 void xsadddp(const DoubleRegister frt, const DoubleRegister fra, |
| 1110 const DoubleRegister frb); |
| 1111 void xssubdp(const DoubleRegister frt, const DoubleRegister fra, |
| 1112 const DoubleRegister frb); |
| 1113 void xsdivdp(const DoubleRegister frt, const DoubleRegister fra, |
| 1114 const DoubleRegister frb); |
| 1115 void xsmuldp(const DoubleRegister frt, const DoubleRegister fra, |
| 1116 const DoubleRegister frc); |
| 1117 |
| 1107 // Pseudo instructions | 1118 // Pseudo instructions |
| 1108 | 1119 |
| 1109 // Different nop operations are used by the code generator to detect certain | 1120 // Different nop operations are used by the code generator to detect certain |
| 1110 // states of the generated code. | 1121 // states of the generated code. |
| 1111 enum NopMarkerTypes { | 1122 enum NopMarkerTypes { |
| 1112 NON_MARKING_NOP = 0, | 1123 NON_MARKING_NOP = 0, |
| 1113 GROUP_ENDING_NOP, | 1124 GROUP_ENDING_NOP, |
| 1114 DEBUG_BREAK_NOP, | 1125 DEBUG_BREAK_NOP, |
| 1115 // IC markers. | 1126 // IC markers. |
| 1116 PROPERTY_ACCESS_INLINED, | 1127 PROPERTY_ACCESS_INLINED, |
| (...skipping 282 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1399 inline void CheckTrampolinePoolQuick(); | 1410 inline void CheckTrampolinePoolQuick(); |
| 1400 | 1411 |
| 1401 // Instruction generation | 1412 // Instruction generation |
| 1402 void a_form(Instr instr, DoubleRegister frt, DoubleRegister fra, | 1413 void a_form(Instr instr, DoubleRegister frt, DoubleRegister fra, |
| 1403 DoubleRegister frb, RCBit r); | 1414 DoubleRegister frb, RCBit r); |
| 1404 void d_form(Instr instr, Register rt, Register ra, const intptr_t val, | 1415 void d_form(Instr instr, Register rt, Register ra, const intptr_t val, |
| 1405 bool signed_disp); | 1416 bool signed_disp); |
| 1406 void x_form(Instr instr, Register ra, Register rs, Register rb, RCBit r); | 1417 void x_form(Instr instr, Register ra, Register rs, Register rb, RCBit r); |
| 1407 void xo_form(Instr instr, Register rt, Register ra, Register rb, OEBit o, | 1418 void xo_form(Instr instr, Register rt, Register ra, Register rb, OEBit o, |
| 1408 RCBit r); | 1419 RCBit r); |
| 1420 void xx3_form(Instr instr, DoubleRegister t, DoubleRegister a, |
| 1421 DoubleRegister b); |
| 1409 void md_form(Instr instr, Register ra, Register rs, int shift, int maskbit, | 1422 void md_form(Instr instr, Register ra, Register rs, int shift, int maskbit, |
| 1410 RCBit r); | 1423 RCBit r); |
| 1411 void mds_form(Instr instr, Register ra, Register rs, Register rb, int maskbit, | 1424 void mds_form(Instr instr, Register ra, Register rs, Register rb, int maskbit, |
| 1412 RCBit r); | 1425 RCBit r); |
| 1413 | 1426 |
| 1414 // Labels | 1427 // Labels |
| 1415 void print(Label* L); | 1428 void print(Label* L); |
| 1416 int max_reach_from(int pos); | 1429 int max_reach_from(int pos); |
| 1417 void bind_to(Label* L, int pos); | 1430 void bind_to(Label* L, int pos); |
| 1418 void next(Label* L); | 1431 void next(Label* L); |
| (...skipping 54 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1473 | 1486 |
| 1474 | 1487 |
| 1475 class EnsureSpace BASE_EMBEDDED { | 1488 class EnsureSpace BASE_EMBEDDED { |
| 1476 public: | 1489 public: |
| 1477 explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); } | 1490 explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); } |
| 1478 }; | 1491 }; |
| 1479 } // namespace internal | 1492 } // namespace internal |
| 1480 } // namespace v8 | 1493 } // namespace v8 |
| 1481 | 1494 |
| 1482 #endif // V8_PPC_ASSEMBLER_PPC_H_ | 1495 #endif // V8_PPC_ASSEMBLER_PPC_H_ |
| OLD | NEW |