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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 215 Memory::Address_at(pc_) = address; | 215 Memory::Address_at(pc_) = address; |
| 216 if (mode == UPDATE_WRITE_BARRIER && host() != NULL) { | 216 if (mode == UPDATE_WRITE_BARRIER && host() != NULL) { |
| 217 // TODO(1550) We are passing NULL as a slot because cell can never be on | 217 // TODO(1550) We are passing NULL as a slot because cell can never be on |
| 218 // evacuation candidate. | 218 // evacuation candidate. |
| 219 host()->GetHeap()->incremental_marking()->RecordWrite( | 219 host()->GetHeap()->incremental_marking()->RecordWrite( |
| 220 host(), NULL, cell); | 220 host(), NULL, cell); |
| 221 } | 221 } |
| 222 } | 222 } |
| 223 | 223 |
| 224 | 224 |
| 225 static const int kNoCodeAgeSequenceLength = 3; | 225 static const int kNoCodeAgeSequenceLength = 3 * Assembler::kInstrSize; |
| 226 | 226 |
| 227 | 227 |
| 228 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) { | 228 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) { |
| 229 UNREACHABLE(); // This should never be reached on Arm. | 229 UNREACHABLE(); // This should never be reached on Arm. |
| 230 return Handle<Object>(); | 230 return Handle<Object>(); |
| 231 } | 231 } |
| 232 | 232 |
| 233 | 233 |
| 234 Code* RelocInfo::code_age_stub() { | 234 Code* RelocInfo::code_age_stub() { |
| 235 ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); | 235 ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); |
| 236 return Code::GetCodeFromTargetAddress( | 236 return Code::GetCodeFromTargetAddress( |
| 237 Memory::Address_at(pc_ + Assembler::kInstrSize * | 237 Memory::Address_at(pc_ + |
| 238 (kNoCodeAgeSequenceLength - 1))); | 238 (kNoCodeAgeSequenceLength - Assembler::kInstrSize))); |
| 239 } | 239 } |
| 240 | 240 |
| 241 | 241 |
| 242 void RelocInfo::set_code_age_stub(Code* stub) { | 242 void RelocInfo::set_code_age_stub(Code* stub) { |
| 243 ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); | 243 ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); |
| 244 Memory::Address_at(pc_ + Assembler::kInstrSize * | 244 Memory::Address_at(pc_ + |
| 245 (kNoCodeAgeSequenceLength - 1)) = | 245 (kNoCodeAgeSequenceLength - Assembler::kInstrSize)) = |
| 246 stub->instruction_start(); | 246 stub->instruction_start(); |
| 247 } | 247 } |
| 248 | 248 |
| 249 | 249 |
| 250 Address RelocInfo::call_address() { | 250 Address RelocInfo::call_address() { |
| 251 // The 2 instructions offset assumes patched debug break slot or return | 251 // The 2 instructions offset assumes patched debug break slot or return |
| 252 // sequence. | 252 // sequence. |
| 253 ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || | 253 ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || |
| 254 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); | 254 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); |
| 255 return Memory::Address_at(pc_ + 2 * Assembler::kInstrSize); | 255 return Memory::Address_at(pc_ + 2 * Assembler::kInstrSize); |
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| 536 // ldr ip, [pc, #...] | 536 // ldr ip, [pc, #...] |
| 537 // since the instruction accessing this address in the constant pool remains | 537 // since the instruction accessing this address in the constant pool remains |
| 538 // unchanged. | 538 // unchanged. |
| 539 } | 539 } |
| 540 } | 540 } |
| 541 | 541 |
| 542 | 542 |
| 543 } } // namespace v8::internal | 543 } } // namespace v8::internal |
| 544 | 544 |
| 545 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ | 545 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ |
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