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Unified Diff: src/compiler/x64/instruction-selector-x64.cc

Issue 2618443003: Revert of [turbofan] Improve codegen for 8- and 16-bit memory comparisons on Intel platforms (Closed)
Patch Set: Created 3 years, 11 months ago
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Index: src/compiler/x64/instruction-selector-x64.cc
diff --git a/src/compiler/x64/instruction-selector-x64.cc b/src/compiler/x64/instruction-selector-x64.cc
index fec37e523681efa10a0d33b6edad073931059f22..2f7446fa6e5b3ba5257b9d40b59ad382babfc49a 100644
--- a/src/compiler/x64/instruction-selector-x64.cc
+++ b/src/compiler/x64/instruction-selector-x64.cc
@@ -1713,54 +1713,21 @@
VisitCompare(selector, opcode, g.UseRegister(left), g.Use(right), cont);
}
-MachineType MachineTypeForNarrow(Node* node, Node* hint_node) {
- if (hint_node->opcode() == IrOpcode::kLoad) {
- MachineType hint = LoadRepresentationOf(hint_node->op());
- if (node->opcode() == IrOpcode::kInt32Constant ||
- node->opcode() == IrOpcode::kInt64Constant) {
- int64_t constant = node->opcode() == IrOpcode::kInt32Constant
- ? OpParameter<int32_t>(node)
- : OpParameter<int64_t>(node);
- if (hint == MachineType::Int8()) {
- if (constant >= std::numeric_limits<int8_t>::min() &&
- constant <= std::numeric_limits<int8_t>::max()) {
- return hint;
- }
- } else if (hint == MachineType::Uint8()) {
- if (constant >= std::numeric_limits<uint8_t>::min() &&
- constant <= std::numeric_limits<uint8_t>::max()) {
- return hint;
- }
- } else if (hint == MachineType::Int16()) {
- if (constant >= std::numeric_limits<int16_t>::min() &&
- constant <= std::numeric_limits<int16_t>::max()) {
- return hint;
- }
- } else if (hint == MachineType::Uint16()) {
- if (constant >= std::numeric_limits<uint16_t>::min() &&
- constant <= std::numeric_limits<uint16_t>::max()) {
- return hint;
- }
- } else if (hint == MachineType::Int32()) {
- return hint;
- } else if (hint == MachineType::Uint32()) {
- if (constant >= 0) return hint;
- }
- }
- }
- return node->opcode() == IrOpcode::kLoad ? LoadRepresentationOf(node->op())
- : MachineType::None();
-}
-
// Tries to match the size of the given opcode to that of the operands, if
// possible.
InstructionCode TryNarrowOpcodeSize(InstructionCode opcode, Node* left,
Node* right, FlagsContinuation* cont) {
- // TODO(epertoso): we can probably get some size information out phi nodes.
+ // Currently, if one of the two operands is not a Load, we don't know what its
+ // machine representation is, so we bail out.
+ // TODO(epertoso): we can probably get some size information out of immediates
+ // and phi nodes.
+ if (left->opcode() != IrOpcode::kLoad || right->opcode() != IrOpcode::kLoad) {
+ return opcode;
+ }
// If the load representations don't match, both operands will be
// zero/sign-extended to 32bit.
- MachineType left_type = MachineTypeForNarrow(left, right);
- MachineType right_type = MachineTypeForNarrow(right, left);
+ MachineType left_type = LoadRepresentationOf(left->op());
+ MachineType right_type = LoadRepresentationOf(right->op());
if (left_type == right_type) {
switch (left_type.representation()) {
case MachineRepresentation::kBit:
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