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Side by Side Diff: src/compiler/x64/instruction-selector-x64.cc

Issue 2618443003: Revert of [turbofan] Improve codegen for 8- and 16-bit memory comparisons on Intel platforms (Closed)
Patch Set: Created 3 years, 11 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <algorithm> 5 #include <algorithm>
6 6
7 #include "src/base/adapters.h" 7 #include "src/base/adapters.h"
8 #include "src/compiler/instruction-selector-impl.h" 8 #include "src/compiler/instruction-selector-impl.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/node-properties.h" 10 #include "src/compiler/node-properties.h"
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1706 void VisitCompare(InstructionSelector* selector, InstructionCode opcode, 1706 void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
1707 Node* left, Node* right, FlagsContinuation* cont, 1707 Node* left, Node* right, FlagsContinuation* cont,
1708 bool commutative) { 1708 bool commutative) {
1709 X64OperandGenerator g(selector); 1709 X64OperandGenerator g(selector);
1710 if (commutative && g.CanBeBetterLeftOperand(right)) { 1710 if (commutative && g.CanBeBetterLeftOperand(right)) {
1711 std::swap(left, right); 1711 std::swap(left, right);
1712 } 1712 }
1713 VisitCompare(selector, opcode, g.UseRegister(left), g.Use(right), cont); 1713 VisitCompare(selector, opcode, g.UseRegister(left), g.Use(right), cont);
1714 } 1714 }
1715 1715
1716 MachineType MachineTypeForNarrow(Node* node, Node* hint_node) {
1717 if (hint_node->opcode() == IrOpcode::kLoad) {
1718 MachineType hint = LoadRepresentationOf(hint_node->op());
1719 if (node->opcode() == IrOpcode::kInt32Constant ||
1720 node->opcode() == IrOpcode::kInt64Constant) {
1721 int64_t constant = node->opcode() == IrOpcode::kInt32Constant
1722 ? OpParameter<int32_t>(node)
1723 : OpParameter<int64_t>(node);
1724 if (hint == MachineType::Int8()) {
1725 if (constant >= std::numeric_limits<int8_t>::min() &&
1726 constant <= std::numeric_limits<int8_t>::max()) {
1727 return hint;
1728 }
1729 } else if (hint == MachineType::Uint8()) {
1730 if (constant >= std::numeric_limits<uint8_t>::min() &&
1731 constant <= std::numeric_limits<uint8_t>::max()) {
1732 return hint;
1733 }
1734 } else if (hint == MachineType::Int16()) {
1735 if (constant >= std::numeric_limits<int16_t>::min() &&
1736 constant <= std::numeric_limits<int16_t>::max()) {
1737 return hint;
1738 }
1739 } else if (hint == MachineType::Uint16()) {
1740 if (constant >= std::numeric_limits<uint16_t>::min() &&
1741 constant <= std::numeric_limits<uint16_t>::max()) {
1742 return hint;
1743 }
1744 } else if (hint == MachineType::Int32()) {
1745 return hint;
1746 } else if (hint == MachineType::Uint32()) {
1747 if (constant >= 0) return hint;
1748 }
1749 }
1750 }
1751 return node->opcode() == IrOpcode::kLoad ? LoadRepresentationOf(node->op())
1752 : MachineType::None();
1753 }
1754
1755 // Tries to match the size of the given opcode to that of the operands, if 1716 // Tries to match the size of the given opcode to that of the operands, if
1756 // possible. 1717 // possible.
1757 InstructionCode TryNarrowOpcodeSize(InstructionCode opcode, Node* left, 1718 InstructionCode TryNarrowOpcodeSize(InstructionCode opcode, Node* left,
1758 Node* right, FlagsContinuation* cont) { 1719 Node* right, FlagsContinuation* cont) {
1759 // TODO(epertoso): we can probably get some size information out phi nodes. 1720 // Currently, if one of the two operands is not a Load, we don't know what its
1721 // machine representation is, so we bail out.
1722 // TODO(epertoso): we can probably get some size information out of immediates
1723 // and phi nodes.
1724 if (left->opcode() != IrOpcode::kLoad || right->opcode() != IrOpcode::kLoad) {
1725 return opcode;
1726 }
1760 // If the load representations don't match, both operands will be 1727 // If the load representations don't match, both operands will be
1761 // zero/sign-extended to 32bit. 1728 // zero/sign-extended to 32bit.
1762 MachineType left_type = MachineTypeForNarrow(left, right); 1729 MachineType left_type = LoadRepresentationOf(left->op());
1763 MachineType right_type = MachineTypeForNarrow(right, left); 1730 MachineType right_type = LoadRepresentationOf(right->op());
1764 if (left_type == right_type) { 1731 if (left_type == right_type) {
1765 switch (left_type.representation()) { 1732 switch (left_type.representation()) {
1766 case MachineRepresentation::kBit: 1733 case MachineRepresentation::kBit:
1767 case MachineRepresentation::kWord8: { 1734 case MachineRepresentation::kWord8: {
1768 if (opcode == kX64Test32) return kX64Test8; 1735 if (opcode == kX64Test32) return kX64Test8;
1769 if (opcode == kX64Cmp32) { 1736 if (opcode == kX64Cmp32) {
1770 if (left_type.semantic() == MachineSemantic::kUint32) { 1737 if (left_type.semantic() == MachineSemantic::kUint32) {
1771 cont->OverwriteUnsignedIfSigned(); 1738 cont->OverwriteUnsignedIfSigned();
1772 } else { 1739 } else {
1773 CHECK_EQ(MachineSemantic::kInt32, left_type.semantic()); 1740 CHECK_EQ(MachineSemantic::kInt32, left_type.semantic());
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2467 // static 2434 // static
2468 MachineOperatorBuilder::AlignmentRequirements 2435 MachineOperatorBuilder::AlignmentRequirements
2469 InstructionSelector::AlignmentRequirements() { 2436 InstructionSelector::AlignmentRequirements() {
2470 return MachineOperatorBuilder::AlignmentRequirements:: 2437 return MachineOperatorBuilder::AlignmentRequirements::
2471 FullUnalignedAccessSupport(); 2438 FullUnalignedAccessSupport();
2472 } 2439 }
2473 2440
2474 } // namespace compiler 2441 } // namespace compiler
2475 } // namespace internal 2442 } // namespace internal
2476 } // namespace v8 2443 } // namespace v8
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