ARM: Remove unused variable

src/arm/disasm-arm.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 // A Disassembler object is used to disassemble a block of code instruction by
 // instruction. The default implementation of the NameConverter object can be
 // overriden to modify register names or to do symbol lookup on addresses.
 //
 // The example below will disassemble a block of code and print it to stdout.
 //
@@ skipping 1858 matching lines @@
         int size = kBitsPerByte * (1 << instr->Bits(21, 20));
         int Vd = instr->VFPDRegValue(kSimd128Precision);
         int Vm = instr->VFPMRegValue(kSimd128Precision);
         int Vn = instr->VFPNRegValue(kSimd128Precision);
         // vadd/vtst.i<size> Qd, Qm, Qn.
         out_buffer_pos_ +=
             SNPrintF(out_buffer_ + out_buffer_pos_, "%s.i%d q%d, q%d, q%d", op,
                      size, Vd, Vn, Vm);
       } else if (instr->Bits(11, 8) == 0xd && instr->Bit(4) == 0) {
         const char* op = (instr->Bits(21, 20) == 0) ? "vadd" : "vsub";
-        int size = kBitsPerByte * (1 << instr->Bits(21, 20));
         int Vd = instr->VFPDRegValue(kSimd128Precision);
         int Vm = instr->VFPMRegValue(kSimd128Precision);
         int Vn = instr->VFPNRegValue(kSimd128Precision);
         // vadd/vsub.f32 Qd, Qm, Qn.
         out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
                                     "%s.f32 q%d, q%d, q%d", op, Vd, Vn, Vm);
       } else if (instr->Bits(11, 8) == 0x9 && instr->Bit(6) == 1 &&
                  instr->Bit(4) == 1) {
         int size = kBitsPerByte * (1 << instr->Bits(21, 20));
         int Vd = instr->VFPDRegValue(kSimd128Precision);
@@ skipping 533 matching lines @@
     pc += d.InstructionDecode(buffer, pc);
     v8::internal::PrintF(f, "%p    %08x      %s\n", static_cast<void*>(prev_pc),
                          *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
   }
 }
 
 
 }  // namespace disasm
 
 #endif  // V8_TARGET_ARCH_ARM