[MIPS] Add seccomp bpf support

sandbox/linux/seccomp-bpf/kernel_return_value_helpers.cc

Index: sandbox/linux/seccomp-bpf/kernel_return_value_helpers.cc
diff --git a/sandbox/linux/seccomp-bpf/kernel_return_value_helpers.cc b/sandbox/linux/seccomp-bpf/kernel_return_value_helpers.cc
new file mode 100644
index 0000000000000000000000000000000000000000..9086e153e1326dc801537c3503353237e8529b48
--- /dev/null
+++ b/sandbox/linux/seccomp-bpf/kernel_return_value_helpers.cc
@@ -0,0 +1,32 @@
+// Copyright 2014 The Chromium Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "sandbox/linux/seccomp-bpf/kernel_return_value_helpers.h"
+#include "sandbox/linux/seccomp-bpf/linux_seccomp.h"
+
+namespace sandbox {
+int ErrnoToKernelRet(int kernel_ret) {
+#if defined(__mips__)
+  // On MIPS, kernel returns kernel_ret (instead of -kernel_ret)
+  return kernel_ret;
+#else
+  return -kernel_ret;
+#endif
+}
+
+void PutValueInUcontext(int ret_val, ucontext_t* ctx) {
+#if defined(__mips__)
+  // Mips ABI states that on error a3 CPU register should be set to one
+  // and if there is no error, it should be zero.
+  if (ret_val < 0) {
+  // On MIPS, kernel returns errno (instead of -errno)
+    ret_val = -ret_val;
+    SECCOMP_PARM4(ctx) = 1;
+  } else
+    SECCOMP_PARM4(ctx) = 0;
+#endif
+  SECCOMP_RESULT(ctx) = static_cast<greg_t>(ret_val);
+}
+
+} // namespace sandbox