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Side by Side Diff: src/compiler/ia32/instruction-selector-ia32.cc

Issue 2605863002: [turbofan] Improve codegen for 8- and 16-bit memory comparisons on Intel platforms (Closed)
Patch Set: Fix assert Created 3 years, 11 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/compiler/instruction-selector-impl.h" 6 #include "src/compiler/instruction-selector-impl.h"
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 #include "src/compiler/node-properties.h" 8 #include "src/compiler/node-properties.h"
9 9
10 namespace v8 { 10 namespace v8 {
(...skipping 1233 matching lines...) Expand 10 before | Expand all | Expand 10 after
1244 void VisitCompare(InstructionSelector* selector, InstructionCode opcode, 1244 void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
1245 Node* left, Node* right, FlagsContinuation* cont, 1245 Node* left, Node* right, FlagsContinuation* cont,
1246 bool commutative) { 1246 bool commutative) {
1247 IA32OperandGenerator g(selector); 1247 IA32OperandGenerator g(selector);
1248 if (commutative && g.CanBeBetterLeftOperand(right)) { 1248 if (commutative && g.CanBeBetterLeftOperand(right)) {
1249 std::swap(left, right); 1249 std::swap(left, right);
1250 } 1250 }
1251 VisitCompare(selector, opcode, g.UseRegister(left), g.Use(right), cont); 1251 VisitCompare(selector, opcode, g.UseRegister(left), g.Use(right), cont);
1252 } 1252 }
1253 1253
1254 MachineType MachineTypeForNarrow(Node* node, Node* hint_node) {
1255 if (hint_node->opcode() == IrOpcode::kLoad) {
1256 MachineType hint = LoadRepresentationOf(hint_node->op());
1257 if (node->opcode() == IrOpcode::kInt32Constant ||
1258 node->opcode() == IrOpcode::kInt64Constant) {
1259 int64_t constant = node->opcode() == IrOpcode::kInt32Constant
1260 ? OpParameter<int32_t>(node)
1261 : OpParameter<int64_t>(node);
1262 if (hint == MachineType::Int8()) {
1263 if (constant >= std::numeric_limits<int8_t>::min() &&
1264 constant <= std::numeric_limits<int8_t>::max()) {
1265 return hint;
1266 }
1267 } else if (hint == MachineType::Uint8()) {
1268 if (constant >= std::numeric_limits<uint8_t>::min() &&
1269 constant <= std::numeric_limits<uint8_t>::max()) {
1270 return hint;
1271 }
1272 } else if (hint == MachineType::Int16()) {
1273 if (constant >= std::numeric_limits<int16_t>::min() &&
1274 constant <= std::numeric_limits<int16_t>::max()) {
1275 return hint;
1276 }
1277 } else if (hint == MachineType::Uint16()) {
1278 if (constant >= std::numeric_limits<uint16_t>::min() &&
1279 constant <= std::numeric_limits<uint16_t>::max()) {
1280 return hint;
1281 }
1282 } else if (hint == MachineType::Int32()) {
1283 return hint;
1284 } else if (hint == MachineType::Uint32()) {
1285 if (constant >= 0) return hint;
1286 }
1287 }
1288 }
1289 return node->opcode() == IrOpcode::kLoad ? LoadRepresentationOf(node->op())
1290 : MachineType::None();
1291 }
1292
1254 // Tries to match the size of the given opcode to that of the operands, if 1293 // Tries to match the size of the given opcode to that of the operands, if
1255 // possible. 1294 // possible.
1256 InstructionCode TryNarrowOpcodeSize(InstructionCode opcode, Node* left, 1295 InstructionCode TryNarrowOpcodeSize(InstructionCode opcode, Node* left,
1257 Node* right, FlagsContinuation* cont) { 1296 Node* right, FlagsContinuation* cont) {
1258 // Currently, if one of the two operands is not a Load, we don't know what its 1297 // TODO(epertoso): we can probably get some size information out of phi nodes.
1259 // machine representation is, so we bail out.
1260 // TODO(epertoso): we can probably get some size information out of immediates
1261 // and phi nodes.
1262 if (left->opcode() != IrOpcode::kLoad || right->opcode() != IrOpcode::kLoad) {
1263 return opcode;
1264 }
1265 // If the load representations don't match, both operands will be 1298 // If the load representations don't match, both operands will be
1266 // zero/sign-extended to 32bit. 1299 // zero/sign-extended to 32bit.
1267 MachineType left_type = LoadRepresentationOf(left->op()); 1300 MachineType left_type = MachineTypeForNarrow(left, right);
1268 MachineType right_type = LoadRepresentationOf(right->op()); 1301 MachineType right_type = MachineTypeForNarrow(right, left);
1269 if (left_type == right_type) { 1302 if (left_type == right_type) {
1270 switch (left_type.representation()) { 1303 switch (left_type.representation()) {
1271 case MachineRepresentation::kBit: 1304 case MachineRepresentation::kBit:
1272 case MachineRepresentation::kWord8: { 1305 case MachineRepresentation::kWord8: {
1273 if (opcode == kIA32Test) return kIA32Test8; 1306 if (opcode == kIA32Test) return kIA32Test8;
1274 if (opcode == kIA32Cmp) { 1307 if (opcode == kIA32Cmp) {
1275 if (left_type.semantic() == MachineSemantic::kUint32) { 1308 if (left_type.semantic() == MachineSemantic::kUint32) {
1276 cont->OverwriteUnsignedIfSigned(); 1309 cont->OverwriteUnsignedIfSigned();
1277 } else { 1310 } else {
1278 CHECK_EQ(MachineSemantic::kInt32, left_type.semantic()); 1311 CHECK_EQ(MachineSemantic::kInt32, left_type.semantic());
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1336 // if one of the two inputs is a memory operand, make sure it's on the left. 1369 // if one of the two inputs is a memory operand, make sure it's on the left.
1337 if ((!g.CanBeImmediate(right) && g.CanBeImmediate(left)) || 1370 if ((!g.CanBeImmediate(right) && g.CanBeImmediate(left)) ||
1338 (g.CanBeMemoryOperand(narrowed_opcode, node, right, effect_level) && 1371 (g.CanBeMemoryOperand(narrowed_opcode, node, right, effect_level) &&
1339 !g.CanBeMemoryOperand(narrowed_opcode, node, left, effect_level))) { 1372 !g.CanBeMemoryOperand(narrowed_opcode, node, left, effect_level))) {
1340 if (!node->op()->HasProperty(Operator::kCommutative)) cont->Commute(); 1373 if (!node->op()->HasProperty(Operator::kCommutative)) cont->Commute();
1341 std::swap(left, right); 1374 std::swap(left, right);
1342 } 1375 }
1343 1376
1344 // Match immediates on right side of comparison. 1377 // Match immediates on right side of comparison.
1345 if (g.CanBeImmediate(right)) { 1378 if (g.CanBeImmediate(right)) {
1346 if (g.CanBeMemoryOperand(opcode, node, left, effect_level)) { 1379 if (g.CanBeMemoryOperand(narrowed_opcode, node, left, effect_level)) {
1347 // TODO(epertoso): we should use `narrowed_opcode' here once we match 1380 return VisitCompareWithMemoryOperand(selector, narrowed_opcode, left,
1348 // immediates too.
1349 return VisitCompareWithMemoryOperand(selector, opcode, left,
1350 g.UseImmediate(right), cont); 1381 g.UseImmediate(right), cont);
1351 } 1382 }
1352 return VisitCompare(selector, opcode, g.Use(left), g.UseImmediate(right), 1383 return VisitCompare(selector, opcode, g.Use(left), g.UseImmediate(right),
1353 cont); 1384 cont);
1354 } 1385 }
1355 1386
1356 // Match memory operands on left side of comparison. 1387 // Match memory operands on left side of comparison.
1357 if (g.CanBeMemoryOperand(narrowed_opcode, node, left, effect_level)) { 1388 if (g.CanBeMemoryOperand(narrowed_opcode, node, left, effect_level)) {
1358 bool needs_byte_register = 1389 bool needs_byte_register =
1359 narrowed_opcode == kIA32Test8 || narrowed_opcode == kIA32Cmp8; 1390 narrowed_opcode == kIA32Test8 || narrowed_opcode == kIA32Cmp8;
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1766 // static 1797 // static
1767 MachineOperatorBuilder::AlignmentRequirements 1798 MachineOperatorBuilder::AlignmentRequirements
1768 InstructionSelector::AlignmentRequirements() { 1799 InstructionSelector::AlignmentRequirements() {
1769 return MachineOperatorBuilder::AlignmentRequirements:: 1800 return MachineOperatorBuilder::AlignmentRequirements::
1770 FullUnalignedAccessSupport(); 1801 FullUnalignedAccessSupport();
1771 } 1802 }
1772 1803
1773 } // namespace compiler 1804 } // namespace compiler
1774 } // namespace internal 1805 } // namespace internal
1775 } // namespace v8 1806 } // namespace v8
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