S390: Fix fast-allocate to handle alignment

src/s390/macro-assembler-s390.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <assert.h>  // For assert
 #include <limits.h>  // For LONG_MIN, LONG_MAX.
 
 #if V8_TARGET_ARCH_S390
 
 #include "src/base/bits.h"
@@ skipping 1607 matching lines @@
 
   // Compare with allocation limit.
   CmpLogicalP(result_end, MemOperand(top_address, limit - top));
   bge(gc_required);
 
   if ((flags & ALLOCATION_FOLDING_DOMINATOR) == 0) {
     // The top pointer is not updated for allocation folding dominators.
     StoreP(result_end, MemOperand(top_address));
   }
 
-  // Prefetch the allocation_top's next cache line in advance to
-  // help alleviate potential cache misses.
-  // Mode 2 - Prefetch the data into a cache line for store access.
-  pfd(r2, MemOperand(result, 256));
+  if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+    // Prefetch the allocation_top's next cache line in advance to
+    // help alleviate potential cache misses.
+    // Mode 2 - Prefetch the data into a cache line for store access.
+    pfd(r2, MemOperand(result, 256));
+  }
 
   // Tag object.
   la(result, MemOperand(result, kHeapObjectTag));
 }
 
 void MacroAssembler::Allocate(Register object_size, Register result,
                               Register result_end, Register scratch,
                               Label* gc_required, AllocationFlags flags) {
   DCHECK((flags & ALLOCATION_FOLDED) == 0);
   if (!FLAG_inline_new) {
@@ skipping 73 matching lines @@
   // Update allocation top. result temporarily holds the new top.
   if (emit_debug_code()) {
     AndP(r0, result_end, Operand(kObjectAlignmentMask));
     Check(eq, kUnalignedAllocationInNewSpace, cr0);
   }
   if ((flags & ALLOCATION_FOLDING_DOMINATOR) == 0) {
     // The top pointer is not updated for allocation folding dominators.
     StoreP(result_end, MemOperand(top_address));
   }
 
-  // Prefetch the allocation_top's next cache line in advance to
-  // help alleviate potential cache misses.
-  // Mode 2 - Prefetch the data into a cache line for store access.
-  pfd(r2, MemOperand(result, 256));
+  if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+    // Prefetch the allocation_top's next cache line in advance to
+    // help alleviate potential cache misses.
+    // Mode 2 - Prefetch the data into a cache line for store access.
+    pfd(r2, MemOperand(result, 256));
+  }
 
   // Tag object.
   la(result, MemOperand(result, kHeapObjectTag));
 }
 
 void MacroAssembler::FastAllocate(Register object_size, Register result,
                                   Register result_end, Register scratch,
                                   AllocationFlags flags) {
   // |object_size| and |result_end| may overlap if the DOUBLE_ALIGNMENT flag
   // is not specified. Other registers must not overlap.
@@ skipping 34 matching lines @@
     AddP(result_end, result, object_size);
   }
 
   // Update allocation top. result temporarily holds the new top.
   if (emit_debug_code()) {
     AndP(r0, result_end, Operand(kObjectAlignmentMask));
     Check(eq, kUnalignedAllocationInNewSpace, cr0);
   }
   StoreP(result_end, MemOperand(top_address));
 
-  // Prefetch the allocation_top's next cache line in advance to
-  // help alleviate potential cache misses.
-  // Mode 2 - Prefetch the data into a cache line for store access.
-  pfd(r2, MemOperand(result, 256));
+  if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+    // Prefetch the allocation_top's next cache line in advance to
+    // help alleviate potential cache misses.
+    // Mode 2 - Prefetch the data into a cache line for store access.
+    pfd(r2, MemOperand(result, 256));
+  }
 
   // Tag object.
   la(result, MemOperand(result, kHeapObjectTag));
 }
 
 void MacroAssembler::FastAllocate(int object_size, Register result,
                                   Register scratch1, Register scratch2,
                                   AllocationFlags flags) {
   DCHECK(object_size <= kMaxRegularHeapObjectSize);
   DCHECK(!AreAliased(result, scratch1, scratch2, ip));
@@ skipping 23 matching lines @@
     AndP(result_end, result, Operand(kDoubleAlignmentMask));
     Label aligned;
     beq(&aligned, Label::kNear);
     mov(result_end, Operand(isolate()->factory()->one_pointer_filler_map()));
     StoreW(result_end, MemOperand(result));
     AddP(result, result, Operand(kDoubleSize / 2));
     bind(&aligned);
 #endif
   }
 
+#if V8_TARGET_ARCH_S390X
+  // Limit to 64-bit only, as double alignment check above may adjust
+  // allocation top by an extra kDoubleSize/2.
   if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT) && is_int8(object_size)) {
     // Update allocation top.
     AddP(MemOperand(top_address), Operand(object_size));
   } else {
     // Calculate new top using result.
     AddP(result_end, result, Operand(object_size));
-
     // Update allocation top.
     StoreP(result_end, MemOperand(top_address));
   }
+#else
+  // Calculate new top using result.
+  AddP(result_end, result, Operand(object_size));
+  // Update allocation top.
+  StoreP(result_end, MemOperand(top_address));
+#endif
 
-  // Prefetch the allocation_top's next cache line in advance to
-  // help alleviate potential cache misses.
-  // Mode 2 - Prefetch the data into a cache line for store access.
-  pfd(r2, MemOperand(result, 256));
+  if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+    // Prefetch the allocation_top's next cache line in advance to
+    // help alleviate potential cache misses.
+    // Mode 2 - Prefetch the data into a cache line for store access.
+    pfd(r2, MemOperand(result, 256));
+  }
 
   // Tag object.
   la(result, MemOperand(result, kHeapObjectTag));
 }
 
 void MacroAssembler::CompareObjectType(Register object, Register map,
                                        Register type_reg, InstanceType type) {
   const Register temp = type_reg.is(no_reg) ? r0 : type_reg;
 
   LoadP(map, FieldMemOperand(object, HeapObject::kMapOffset));
@@ skipping 3256 matching lines @@
   }
   if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift));
   ExtractBit(r0, dividend, 31);
   AddP(result, r0);
 }
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_S390