| OLD | NEW |
| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 | 5 |
| 6 // Declares a Simulator for MIPS instructions if we are not generating a native | 6 // Declares a Simulator for MIPS instructions if we are not generating a native |
| 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation | 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation |
| 8 // on regular desktop machines. | 8 // on regular desktop machines. |
| 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, | 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, |
| 10 // which will start execution in the Simulator or forwards to the real entry | 10 // which will start execution in the Simulator or forwards to the real entry |
| (...skipping 275 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 286 // simulated execution, so that the simulator can "return" to the native | 286 // simulated execution, so that the simulator can "return" to the native |
| 287 // C code. | 287 // C code. |
| 288 end_sim_pc = -2, | 288 end_sim_pc = -2, |
| 289 // Unpredictable value. | 289 // Unpredictable value. |
| 290 Unpredictable = 0xbadbeaf | 290 Unpredictable = 0xbadbeaf |
| 291 }; | 291 }; |
| 292 | 292 |
| 293 // Unsupported instructions use Format to print an error and stop execution. | 293 // Unsupported instructions use Format to print an error and stop execution. |
| 294 void Format(Instruction* instr, const char* format); | 294 void Format(Instruction* instr, const char* format); |
| 295 | 295 |
| 296 // Helpers for data value tracing. |
| 297 enum TraceType { BYTE, HALF, WORD, DWORD, FLOAT, DOUBLE, FLOAT_DOUBLE }; |
| 298 |
| 296 // Read and write memory. | 299 // Read and write memory. |
| 297 inline uint32_t ReadBU(int32_t addr); | 300 inline uint32_t ReadBU(int32_t addr); |
| 298 inline int32_t ReadB(int32_t addr); | 301 inline int32_t ReadB(int32_t addr); |
| 299 inline void WriteB(int32_t addr, uint8_t value); | 302 inline void WriteB(int32_t addr, uint8_t value); |
| 300 inline void WriteB(int32_t addr, int8_t value); | 303 inline void WriteB(int32_t addr, int8_t value); |
| 301 | 304 |
| 302 inline uint16_t ReadHU(int32_t addr, Instruction* instr); | 305 inline uint16_t ReadHU(int32_t addr, Instruction* instr); |
| 303 inline int16_t ReadH(int32_t addr, Instruction* instr); | 306 inline int16_t ReadH(int32_t addr, Instruction* instr); |
| 304 // Note: Overloaded on the sign of the value. | 307 // Note: Overloaded on the sign of the value. |
| 305 inline void WriteH(int32_t addr, uint16_t value, Instruction* instr); | 308 inline void WriteH(int32_t addr, uint16_t value, Instruction* instr); |
| 306 inline void WriteH(int32_t addr, int16_t value, Instruction* instr); | 309 inline void WriteH(int32_t addr, int16_t value, Instruction* instr); |
| 307 | 310 |
| 308 inline int ReadW(int32_t addr, Instruction* instr); | 311 inline int ReadW(int32_t addr, Instruction* instr, TraceType t = WORD); |
| 309 inline void WriteW(int32_t addr, int value, Instruction* instr); | 312 inline void WriteW(int32_t addr, int value, Instruction* instr); |
| 310 | 313 |
| 311 inline double ReadD(int32_t addr, Instruction* instr); | 314 inline double ReadD(int32_t addr, Instruction* instr); |
| 312 inline void WriteD(int32_t addr, double value, Instruction* instr); | 315 inline void WriteD(int32_t addr, double value, Instruction* instr); |
| 313 | 316 |
| 314 // Helpers for data value tracing. | 317 void TraceRegWr(int32_t value, TraceType t = WORD); |
| 315 enum TraceType { | 318 void TraceRegWr(int64_t value, TraceType t = DWORD); |
| 316 BYTE, | 319 void TraceMemWr(int32_t addr, int32_t value, TraceType t = WORD); |
| 317 HALF, | 320 void TraceMemRd(int32_t addr, int32_t value, TraceType t = WORD); |
| 318 WORD | 321 void TraceMemWr(int32_t addr, int64_t value, TraceType t = DWORD); |
| 319 // DWORD, | 322 void TraceMemRd(int32_t addr, int64_t value, TraceType t = DWORD); |
| 320 // DFLOAT - Floats may have printing issues due to paired lwc1's | |
| 321 }; | |
| 322 | |
| 323 void TraceRegWr(int32_t value); | |
| 324 void TraceMemWr(int32_t addr, int32_t value, TraceType t); | |
| 325 void TraceMemRd(int32_t addr, int32_t value); | |
| 326 EmbeddedVector<char, 128> trace_buf_; | 323 EmbeddedVector<char, 128> trace_buf_; |
| 327 | 324 |
| 328 // Operations depending on endianness. | 325 // Operations depending on endianness. |
| 329 // Get Double Higher / Lower word. | 326 // Get Double Higher / Lower word. |
| 330 inline int32_t GetDoubleHIW(double* addr); | 327 inline int32_t GetDoubleHIW(double* addr); |
| 331 inline int32_t GetDoubleLOW(double* addr); | 328 inline int32_t GetDoubleLOW(double* addr); |
| 332 // Set Double Higher / Lower word. | 329 // Set Double Higher / Lower word. |
| 333 inline int32_t SetDoubleHIW(double* addr); | 330 inline int32_t SetDoubleHIW(double* addr); |
| 334 inline int32_t SetDoubleLOW(double* addr); | 331 inline int32_t SetDoubleLOW(double* addr); |
| 335 | 332 |
| (...skipping 38 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 374 inline int32_t ft_reg() const { return instr_.FtValue(); } | 371 inline int32_t ft_reg() const { return instr_.FtValue(); } |
| 375 inline int32_t fd_reg() const { return instr_.FdValue(); } | 372 inline int32_t fd_reg() const { return instr_.FdValue(); } |
| 376 inline int32_t sa() const { return instr_.SaValue(); } | 373 inline int32_t sa() const { return instr_.SaValue(); } |
| 377 inline int32_t lsa_sa() const { return instr_.LsaSaValue(); } | 374 inline int32_t lsa_sa() const { return instr_.LsaSaValue(); } |
| 378 | 375 |
| 379 inline void SetResult(int32_t rd_reg, int32_t alu_out) { | 376 inline void SetResult(int32_t rd_reg, int32_t alu_out) { |
| 380 set_register(rd_reg, alu_out); | 377 set_register(rd_reg, alu_out); |
| 381 TraceRegWr(alu_out); | 378 TraceRegWr(alu_out); |
| 382 } | 379 } |
| 383 | 380 |
| 381 inline void SetFPUWordResult(int32_t fd_reg, int32_t alu_out) { |
| 382 set_fpu_register_word(fd_reg, alu_out); |
| 383 TraceRegWr(get_fpu_register_word(fd_reg)); |
| 384 } |
| 385 |
| 386 inline void SetFPUResult(int32_t fd_reg, int64_t alu_out) { |
| 387 set_fpu_register(fd_reg, alu_out); |
| 388 TraceRegWr(get_fpu_register(fd_reg)); |
| 389 } |
| 390 |
| 391 inline void SetFPUFloatResult(int32_t fd_reg, float alu_out) { |
| 392 set_fpu_register_float(fd_reg, alu_out); |
| 393 TraceRegWr(get_fpu_register_word(fd_reg), FLOAT); |
| 394 } |
| 395 |
| 396 inline void SetFPUDoubleResult(int32_t fd_reg, double alu_out) { |
| 397 set_fpu_register_double(fd_reg, alu_out); |
| 398 TraceRegWr(get_fpu_register(fd_reg), DOUBLE); |
| 399 } |
| 400 |
| 384 void DecodeTypeImmediate(); | 401 void DecodeTypeImmediate(); |
| 385 void DecodeTypeJump(); | 402 void DecodeTypeJump(); |
| 386 | 403 |
| 387 // Used for breakpoints and traps. | 404 // Used for breakpoints and traps. |
| 388 void SoftwareInterrupt(); | 405 void SoftwareInterrupt(); |
| 389 | 406 |
| 390 // Compact branch guard. | 407 // Compact branch guard. |
| 391 void CheckForbiddenSlot(int32_t current_pc) { | 408 void CheckForbiddenSlot(int32_t current_pc) { |
| 392 Instruction* instr_after_compact_branch = | 409 Instruction* instr_after_compact_branch = |
| 393 reinterpret_cast<Instruction*>(current_pc + Instruction::kInstrSize); | 410 reinterpret_cast<Instruction*>(current_pc + Instruction::kInstrSize); |
| (...skipping 143 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 537 static inline void UnregisterCTryCatch(Isolate* isolate) { | 554 static inline void UnregisterCTryCatch(Isolate* isolate) { |
| 538 Simulator::current(isolate)->PopAddress(); | 555 Simulator::current(isolate)->PopAddress(); |
| 539 } | 556 } |
| 540 }; | 557 }; |
| 541 | 558 |
| 542 } // namespace internal | 559 } // namespace internal |
| 543 } // namespace v8 | 560 } // namespace v8 |
| 544 | 561 |
| 545 #endif // !defined(USE_SIMULATOR) | 562 #endif // !defined(USE_SIMULATOR) |
| 546 #endif // V8_MIPS_SIMULATOR_MIPS_H_ | 563 #endif // V8_MIPS_SIMULATOR_MIPS_H_ |
| OLD | NEW |