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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 | 5 |
6 // Declares a Simulator for MIPS instructions if we are not generating a native | 6 // Declares a Simulator for MIPS instructions if we are not generating a native |
7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation | 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation |
8 // on regular desktop machines. | 8 // on regular desktop machines. |
9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, | 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, |
10 // which will start execution in the Simulator or forwards to the real entry | 10 // which will start execution in the Simulator or forwards to the real entry |
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296 // simulated execution, so that the simulator can "return" to the native | 296 // simulated execution, so that the simulator can "return" to the native |
297 // C code. | 297 // C code. |
298 end_sim_pc = -2, | 298 end_sim_pc = -2, |
299 // Unpredictable value. | 299 // Unpredictable value. |
300 Unpredictable = 0xbadbeaf | 300 Unpredictable = 0xbadbeaf |
301 }; | 301 }; |
302 | 302 |
303 // Unsupported instructions use Format to print an error and stop execution. | 303 // Unsupported instructions use Format to print an error and stop execution. |
304 void Format(Instruction* instr, const char* format); | 304 void Format(Instruction* instr, const char* format); |
305 | 305 |
| 306 // Helpers for data value tracing. |
| 307 enum TraceType { |
| 308 BYTE, |
| 309 HALF, |
| 310 WORD, |
| 311 DWORD, |
| 312 FLOAT, |
| 313 DOUBLE, |
| 314 FLOAT_DOUBLE, |
| 315 WORD_DWORD |
| 316 }; |
| 317 |
306 // Read and write memory. | 318 // Read and write memory. |
307 inline uint32_t ReadBU(int64_t addr); | 319 inline uint32_t ReadBU(int64_t addr); |
308 inline int32_t ReadB(int64_t addr); | 320 inline int32_t ReadB(int64_t addr); |
309 inline void WriteB(int64_t addr, uint8_t value); | 321 inline void WriteB(int64_t addr, uint8_t value); |
310 inline void WriteB(int64_t addr, int8_t value); | 322 inline void WriteB(int64_t addr, int8_t value); |
311 | 323 |
312 inline uint16_t ReadHU(int64_t addr, Instruction* instr); | 324 inline uint16_t ReadHU(int64_t addr, Instruction* instr); |
313 inline int16_t ReadH(int64_t addr, Instruction* instr); | 325 inline int16_t ReadH(int64_t addr, Instruction* instr); |
314 // Note: Overloaded on the sign of the value. | 326 // Note: Overloaded on the sign of the value. |
315 inline void WriteH(int64_t addr, uint16_t value, Instruction* instr); | 327 inline void WriteH(int64_t addr, uint16_t value, Instruction* instr); |
316 inline void WriteH(int64_t addr, int16_t value, Instruction* instr); | 328 inline void WriteH(int64_t addr, int16_t value, Instruction* instr); |
317 | 329 |
318 inline uint32_t ReadWU(int64_t addr, Instruction* instr); | 330 inline uint32_t ReadWU(int64_t addr, Instruction* instr); |
319 inline int32_t ReadW(int64_t addr, Instruction* instr); | 331 inline int32_t ReadW(int64_t addr, Instruction* instr, TraceType t = WORD); |
320 inline void WriteW(int64_t addr, int32_t value, Instruction* instr); | 332 inline void WriteW(int64_t addr, int32_t value, Instruction* instr); |
321 inline int64_t Read2W(int64_t addr, Instruction* instr); | 333 inline int64_t Read2W(int64_t addr, Instruction* instr); |
322 inline void Write2W(int64_t addr, int64_t value, Instruction* instr); | 334 inline void Write2W(int64_t addr, int64_t value, Instruction* instr); |
323 | 335 |
324 inline double ReadD(int64_t addr, Instruction* instr); | 336 inline double ReadD(int64_t addr, Instruction* instr); |
325 inline void WriteD(int64_t addr, double value, Instruction* instr); | 337 inline void WriteD(int64_t addr, double value, Instruction* instr); |
326 | 338 |
327 // Helper for debugging memory access. | 339 // Helper for debugging memory access. |
328 inline void DieOrDebug(); | 340 inline void DieOrDebug(); |
329 | 341 |
330 // Helpers for data value tracing. | 342 void TraceRegWr(int64_t value, TraceType t = DWORD); |
331 enum TraceType { | |
332 BYTE, | |
333 HALF, | |
334 WORD, | |
335 DWORD | |
336 // DFLOAT - Floats may have printing issues due to paired lwc1's | |
337 }; | |
338 | |
339 void TraceRegWr(int64_t value); | |
340 void TraceMemWr(int64_t addr, int64_t value, TraceType t); | 343 void TraceMemWr(int64_t addr, int64_t value, TraceType t); |
341 void TraceMemRd(int64_t addr, int64_t value); | 344 void TraceMemRd(int64_t addr, int64_t value, TraceType t = DWORD); |
342 | 345 |
343 // Operations depending on endianness. | 346 // Operations depending on endianness. |
344 // Get Double Higher / Lower word. | 347 // Get Double Higher / Lower word. |
345 inline int32_t GetDoubleHIW(double* addr); | 348 inline int32_t GetDoubleHIW(double* addr); |
346 inline int32_t GetDoubleLOW(double* addr); | 349 inline int32_t GetDoubleLOW(double* addr); |
347 // Set Double Higher / Lower word. | 350 // Set Double Higher / Lower word. |
348 inline int32_t SetDoubleHIW(double* addr); | 351 inline int32_t SetDoubleHIW(double* addr); |
349 inline int32_t SetDoubleLOW(double* addr); | 352 inline int32_t SetDoubleLOW(double* addr); |
350 | 353 |
351 SimInstruction instr_; | 354 SimInstruction instr_; |
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555 static inline void UnregisterCTryCatch(Isolate* isolate) { | 558 static inline void UnregisterCTryCatch(Isolate* isolate) { |
556 Simulator::current(isolate)->PopAddress(); | 559 Simulator::current(isolate)->PopAddress(); |
557 } | 560 } |
558 }; | 561 }; |
559 | 562 |
560 } // namespace internal | 563 } // namespace internal |
561 } // namespace v8 | 564 } // namespace v8 |
562 | 565 |
563 #endif // !defined(USE_SIMULATOR) | 566 #endif // !defined(USE_SIMULATOR) |
564 #endif // V8_MIPS_SIMULATOR_MIPS_H_ | 567 #endif // V8_MIPS_SIMULATOR_MIPS_H_ |
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