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Side by Side Diff: src/IceClFlags.def

Issue 2602713002: Subzero: Fix some build problems against LLVM trunk. (Closed)
Patch Set: Reformat Created 3 years, 11 months ago
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1 //===- subzero/src/IceClFlags.def - Cl Flags for translation ----*- C++ -*-===// 1 //===- subzero/src/IceClFlags.def - Cl Flags for translation ----*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 27 matching lines...) Expand all
38 X(NumTranslationThreads, uint32_t, release_opt_flag, "threads", \ 38 X(NumTranslationThreads, uint32_t, release_opt_flag, "threads", \
39 cl::desc("Number of translation threads (0 for purely sequential)"), \ 39 cl::desc("Number of translation threads (0 for purely sequential)"), \
40 cl::init(2)) \ 40 cl::init(2)) \
41 \ 41 \
42 X(OptLevel, Ice::OptLevel, release_opt_flag, cl::desc("Optimization level"), \ 42 X(OptLevel, Ice::OptLevel, release_opt_flag, cl::desc("Optimization level"), \
43 cl::init(Ice::Opt_m1), cl::value_desc("level"), \ 43 cl::init(Ice::Opt_m1), cl::value_desc("level"), \
44 cl::values(clEnumValN(Ice::Opt_m1, "Om1", "-1"), \ 44 cl::values(clEnumValN(Ice::Opt_m1, "Om1", "-1"), \
45 clEnumValN(Ice::Opt_m1, "O-1", "-1"), \ 45 clEnumValN(Ice::Opt_m1, "O-1", "-1"), \
46 clEnumValN(Ice::Opt_0, "O0", "0"), \ 46 clEnumValN(Ice::Opt_0, "O0", "0"), \
47 clEnumValN(Ice::Opt_1, "O1", "1"), \ 47 clEnumValN(Ice::Opt_1, "O1", "1"), \
48 clEnumValN(Ice::Opt_2, "O2", "2"), clEnumValEnd)) \ 48 clEnumValN(Ice::Opt_2, "O2", "2") CLENUMVALEND)) \
49 \ 49 \
50 X(OutputFilename, std::string, release_opt_flag, "o", \ 50 X(OutputFilename, std::string, release_opt_flag, "o", \
51 cl::desc("Override output filename"), cl::init("-"), \ 51 cl::desc("Override output filename"), cl::init("-"), \
52 cl::value_desc("filename")) \ 52 cl::value_desc("filename")) \
53 \ 53 \
54 X(TargetArch, Ice::TargetArch, release_opt_flag, "target", \ 54 X(TargetArch, Ice::TargetArch, release_opt_flag, "target", \
55 cl::desc("Target architecture:"), cl::init(Ice::Target_X8632), \ 55 cl::desc("Target architecture:"), cl::init(Ice::Target_X8632), \
56 cl::values( \ 56 cl::values( \
57 clEnumValN(Ice::Target_X8632, "x8632", "x86-32"), \ 57 clEnumValN(Ice::Target_X8632, "x8632", "x86-32"), \
58 clEnumValN(Ice::Target_X8632, "x86-32", "x86-32 (same as x8632)"), \ 58 clEnumValN(Ice::Target_X8632, "x86-32", "x86-32 (same as x8632)"), \
59 clEnumValN(Ice::Target_X8632, "x86_32", "x86-32 (same as x8632)"), \ 59 clEnumValN(Ice::Target_X8632, "x86_32", "x86-32 (same as x8632)"), \
60 clEnumValN(Ice::Target_X8664, "x8664", "x86-64"), \ 60 clEnumValN(Ice::Target_X8664, "x8664", "x86-64"), \
61 clEnumValN(Ice::Target_X8664, "x86-64", "x86-64 (same as x8664)"), \ 61 clEnumValN(Ice::Target_X8664, "x86-64", "x86-64 (same as x8664)"), \
62 clEnumValN(Ice::Target_X8664, "x86_64", "x86-64 (same as x8664)"), \ 62 clEnumValN(Ice::Target_X8664, "x86_64", "x86-64 (same as x8664)"), \
63 clEnumValN(Ice::Target_ARM32, "arm", "arm32"), \ 63 clEnumValN(Ice::Target_ARM32, "arm", "arm32"), \
64 clEnumValN(Ice::Target_ARM32, "arm32", "arm32 (same as arm)"), \ 64 clEnumValN(Ice::Target_ARM32, "arm32", "arm32 (same as arm)"), \
65 clEnumValN(Ice::Target_ARM64, "arm64", "arm64"), \ 65 clEnumValN(Ice::Target_ARM64, "arm64", "arm64"), \
66 clEnumValN(Ice::Target_MIPS32, "mips", "mips32"), \ 66 clEnumValN(Ice::Target_MIPS32, "mips", "mips32"), \
67 clEnumValN(Ice::Target_MIPS32, "mips32", "mips32 (same as mips)"), \ 67 clEnumValN(Ice::Target_MIPS32, "mips32", "mips32 (same as mips)") \
68 clEnumValEnd)) \ 68 CLENUMVALEND)) \
69 \ 69 \
70 /* The following are development flags, and ideally should not appear in a \ 70 /* The following are development flags, and ideally should not appear in a \
71 * release build. */ \ 71 * release build. */ \
72 \ 72 \
73 X(AllowErrorRecovery, bool, dev_opt_flag, \ 73 X(AllowErrorRecovery, bool, dev_opt_flag, \
74 "allow-pnacl-reader-error-recovery", \ 74 "allow-pnacl-reader-error-recovery", \
75 cl::desc("Allow error recovery when reading PNaCl bitcode."), \ 75 cl::desc("Allow error recovery when reading PNaCl bitcode."), \
76 cl::init(false)) \ 76 cl::init(false)) \
77 \ 77 \
78 X(AllowExternDefinedSymbols, bool, dev_opt_flag, \ 78 X(AllowExternDefinedSymbols, bool, dev_opt_flag, \
(...skipping 64 matching lines...) Expand 10 before | Expand all | Expand 10 after
143 cl::desc("Instrument basic blocks, and output profiling " \ 143 cl::desc("Instrument basic blocks, and output profiling " \
144 "information to stdout at the end of program execution."), \ 144 "information to stdout at the end of program execution."), \
145 cl::init(false)) \ 145 cl::init(false)) \
146 \ 146 \
147 X(LocalCSE, Ice::LCSEOptions, dev_opt_flag, "lcse", \ 147 X(LocalCSE, Ice::LCSEOptions, dev_opt_flag, "lcse", \
148 cl::desc("Local common subexpression elimination"), \ 148 cl::desc("Local common subexpression elimination"), \
149 cl::init(Ice::LCSE_EnabledSSA), \ 149 cl::init(Ice::LCSE_EnabledSSA), \
150 cl::values( \ 150 cl::values( \
151 clEnumValN(Ice::LCSE_Disabled, "0", "disabled"), \ 151 clEnumValN(Ice::LCSE_Disabled, "0", "disabled"), \
152 clEnumValN(Ice::LCSE_EnabledSSA, "enabled", "assume-ssa"), \ 152 clEnumValN(Ice::LCSE_EnabledSSA, "enabled", "assume-ssa"), \
153 clEnumValN(Ice::LCSE_EnabledNoSSA, "no-ssa", "no-assume-ssa"), \ 153 clEnumValN(Ice::LCSE_EnabledNoSSA, "no-ssa", "no-assume-ssa") \
154 clEnumValEnd)) \ 154 CLENUMVALEND)) \
155 \ 155 \
156 X(EmitRevision, bool, dev_opt_flag, "emit-revision", \ 156 X(EmitRevision, bool, dev_opt_flag, "emit-revision", \
157 cl::desc("Emit Subzero revision string into the output"), cl::init(true)) \ 157 cl::desc("Emit Subzero revision string into the output"), cl::init(true)) \
158 \ 158 \
159 X(EnablePhiEdgeSplit, bool, dev_opt_flag, "phi-edge-split", \ 159 X(EnablePhiEdgeSplit, bool, dev_opt_flag, "phi-edge-split", \
160 cl::desc("Enable edge splitting for Phi lowering"), cl::init(true)) \ 160 cl::desc("Enable edge splitting for Phi lowering"), cl::init(true)) \
161 \ 161 \
162 X(EnableShortCircuit, bool, dev_opt_flag, "enable-sc", \ 162 X(EnableShortCircuit, bool, dev_opt_flag, "enable-sc", \
163 cl::desc("Split Nodes for short circuit evaluation"), cl::init(false)) \ 163 cl::desc("Split Nodes for short circuit evaluation"), cl::init(false)) \
164 \ 164 \
(...skipping 17 matching lines...) Expand all
182 "this executable."), \ 182 "this executable."), \
183 cl::init(false)) \ 183 cl::init(false)) \
184 \ 184 \
185 X(SplitGlobalVars, bool, dev_opt_flag, "split-global-vars", \ 185 X(SplitGlobalVars, bool, dev_opt_flag, "split-global-vars", \
186 cl::desc("Global live range splitting"), \ 186 cl::desc("Global live range splitting"), \
187 cl::init(false)) \ 187 cl::init(false)) \
188 \ 188 \
189 X(InputFileFormat, llvm::NaClFileFormat, dev_opt_flag, "bitcode-format", \ 189 X(InputFileFormat, llvm::NaClFileFormat, dev_opt_flag, "bitcode-format", \
190 cl::desc("Define format of input file:"), \ 190 cl::desc("Define format of input file:"), \
191 cl::values(clEnumValN(llvm::LLVMFormat, "llvm", "LLVM file (default)"), \ 191 cl::values(clEnumValN(llvm::LLVMFormat, "llvm", "LLVM file (default)"), \
192 clEnumValN(llvm::PNaClFormat, "pnacl", "PNaCl bitcode file"), \ 192 clEnumValN(llvm::PNaClFormat, "pnacl", "PNaCl bitcode file") \
193 clEnumValEnd), \ 193 CLENUMVALEND), \
194 cl::init(llvm::LLVMFormat)) \ 194 cl::init(llvm::LLVMFormat)) \
195 \ 195 \
196 X(KeepDeletedInsts, bool, dev_opt_flag, "keep-deleted-insts", \ 196 X(KeepDeletedInsts, bool, dev_opt_flag, "keep-deleted-insts", \
197 cl::desc("Retain deleted instructions in the Cfg"), \ 197 cl::desc("Retain deleted instructions in the Cfg"), \
198 cl::init(Ice::BuildDefs::dump())) \ 198 cl::init(Ice::BuildDefs::dump())) \
199 \ 199 \
200 X(LLVMVerboseErrors, bool, dev_opt_flag, "verbose-llvm-parse-errors", \ 200 X(LLVMVerboseErrors, bool, dev_opt_flag, "verbose-llvm-parse-errors", \
201 cl::desc("Print out more descriptive PNaCl bitcode parse errors when " \ 201 cl::desc("Print out more descriptive PNaCl bitcode parse errors when " \
202 "building LLVM IR first"), \ 202 "building LLVM IR first"), \
203 cl::init(false)) \ 203 cl::init(false)) \
(...skipping 15 matching lines...) Expand all
219 \ 219 \
220 X(NopProbabilityAsPercentage, int, dev_opt_flag, "nop-insertion-percentage", \ 220 X(NopProbabilityAsPercentage, int, dev_opt_flag, "nop-insertion-percentage", \
221 cl::desc("Nop insertion probability as percentage"), cl::init(10)) \ 221 cl::desc("Nop insertion probability as percentage"), cl::init(10)) \
222 \ 222 \
223 X(OutFileType, Ice::FileType, dev_opt_flag, "filetype", \ 223 X(OutFileType, Ice::FileType, dev_opt_flag, "filetype", \
224 cl::desc("Output file type"), cl::init(Ice::FT_Iasm), \ 224 cl::desc("Output file type"), cl::init(Ice::FT_Iasm), \
225 cl::values( \ 225 cl::values( \
226 clEnumValN(Ice::FT_Elf, "obj", "Native ELF object ('.o') file"), \ 226 clEnumValN(Ice::FT_Elf, "obj", "Native ELF object ('.o') file"), \
227 clEnumValN(Ice::FT_Asm, "asm", "Assembly ('.s') file"), \ 227 clEnumValN(Ice::FT_Asm, "asm", "Assembly ('.s') file"), \
228 clEnumValN(Ice::FT_Iasm, "iasm", \ 228 clEnumValN(Ice::FT_Iasm, "iasm", \
229 "Low-level integrated assembly ('.s') file"), \ 229 "Low-level integrated assembly ('.s') file") \
230 clEnumValEnd)) \ 230 CLENUMVALEND)) \
231 \ 231 \
232 X(ApplicationBinaryInterface, Ice::ABI, dev_opt_flag, "abi", \ 232 X(ApplicationBinaryInterface, Ice::ABI, dev_opt_flag, "abi", \
233 cl::desc("ABI type"), cl::init(Ice::ABI_PNaCl), \ 233 cl::desc("ABI type"), cl::init(Ice::ABI_PNaCl), \
234 cl::values( \ 234 cl::values( \
235 clEnumValN(Ice::ABI_PNaCl, "pnacl", "x32 for unsandboxed 64-bit x86"), \ 235 clEnumValN(Ice::ABI_PNaCl, "pnacl", "x32 for unsandboxed 64-bit x86"), \
236 clEnumValN(Ice::ABI_Platform, "platform", "Native executable ABI"), \ 236 clEnumValN(Ice::ABI_Platform, "platform", "Native executable ABI") \
237 clEnumValEnd)) \ 237 CLENUMVALEND)) \
238 \ 238 \
239 X(ParseParallel, bool, dev_opt_flag, "parse-parallel", \ 239 X(ParseParallel, bool, dev_opt_flag, "parse-parallel", \
240 cl::desc("Parse function blocks in parallel"), cl::init(true)) \ 240 cl::desc("Parse function blocks in parallel"), cl::init(true)) \
241 \ 241 \
242 X(RandomizeAndPoolImmediatesOption, Ice::RandomizeAndPoolImmediatesEnum, \ 242 X(RandomizeAndPoolImmediatesOption, Ice::RandomizeAndPoolImmediatesEnum, \
243 dev_opt_flag, "randomize-pool-immediates", \ 243 dev_opt_flag, "randomize-pool-immediates", \
244 cl::desc("Randomize or pooling the representation of immediates"), \ 244 cl::desc("Randomize or pooling the representation of immediates"), \
245 cl::init(Ice::RPI_None), \ 245 cl::init(Ice::RPI_None), \
246 cl::values(clEnumValN(Ice::RPI_None, "none", \ 246 cl::values(clEnumValN(Ice::RPI_None, "none", \
247 "Do not randomize or pooling immediates (default)"), \ 247 "Do not randomize or pooling immediates (default)"), \
248 clEnumValN(Ice::RPI_Randomize, "randomize", \ 248 clEnumValN(Ice::RPI_Randomize, "randomize", \
249 "Turn on immediate constants blinding"), \ 249 "Turn on immediate constants blinding"), \
250 clEnumValN(Ice::RPI_Pool, "pool", \ 250 clEnumValN(Ice::RPI_Pool, "pool", \
251 "Turn on immediate constants pooling"), \ 251 "Turn on immediate constants pooling") \
252 clEnumValEnd)) \ 252 CLENUMVALEND)) \
253 \ 253 \
254 X(RandomizeAndPoolImmediatesThreshold, uint32_t, dev_opt_flag, \ 254 X(RandomizeAndPoolImmediatesThreshold, uint32_t, dev_opt_flag, \
255 "randomize-pool-threshold", \ 255 "randomize-pool-threshold", \
256 cl::desc("The threshold for immediates randomization and pooling"), \ 256 cl::desc("The threshold for immediates randomization and pooling"), \
257 cl::init(0xffff)) \ 257 cl::init(0xffff)) \
258 \ 258 \
259 X(RandomizeRegisterAllocation, bool, dev_opt_flag, "randomize-regalloc", \ 259 X(RandomizeRegisterAllocation, bool, dev_opt_flag, "randomize-regalloc", \
260 cl::desc("Randomize register allocation"), cl::init(false)) \ 260 cl::desc("Randomize register allocation"), cl::init(false)) \
261 \ 261 \
262 X(SplitLocalVars, bool, dev_opt_flag, "split-local-vars", cl::init(true), \ 262 X(SplitLocalVars, bool, dev_opt_flag, "split-local-vars", cl::init(true), \
(...skipping 50 matching lines...) Expand 10 before | Expand all | Expand 10 after
313 cl::values( \ 313 cl::values( \
314 clEnumValN(Ice::BaseInstructionSet, "base", \ 314 clEnumValN(Ice::BaseInstructionSet, "base", \
315 "Target chooses baseline instruction set (default)"), \ 315 "Target chooses baseline instruction set (default)"), \
316 clEnumValN(Ice::X86InstructionSet_SSE2, "sse2", \ 316 clEnumValN(Ice::X86InstructionSet_SSE2, "sse2", \
317 "Enable X86 SSE2 instructions"), \ 317 "Enable X86 SSE2 instructions"), \
318 clEnumValN(Ice::X86InstructionSet_SSE4_1, "sse4.1", \ 318 clEnumValN(Ice::X86InstructionSet_SSE4_1, "sse4.1", \
319 "Enable X86 SSE 4.1 instructions"), \ 319 "Enable X86 SSE 4.1 instructions"), \
320 clEnumValN(Ice::ARM32InstructionSet_Neon, "neon", \ 320 clEnumValN(Ice::ARM32InstructionSet_Neon, "neon", \
321 "Enable ARM Neon instructions"), \ 321 "Enable ARM Neon instructions"), \
322 clEnumValN(Ice::ARM32InstructionSet_HWDivArm, "hwdiv-arm", \ 322 clEnumValN(Ice::ARM32InstructionSet_HWDivArm, "hwdiv-arm", \
323 "Enable ARM integer divide instructions in ARM mode"), \ 323 "Enable ARM integer divide instructions in ARM mode") \
324 clEnumValEnd)) \ 324 CLENUMVALEND)) \
325 \ 325 \
326 X(TestPrefix, std::string, dev_opt_flag, "prefix", \ 326 X(TestPrefix, std::string, dev_opt_flag, "prefix", \
327 cl::desc("Prepend a prefix to symbol names for testing"), cl::init(""), \ 327 cl::desc("Prepend a prefix to symbol names for testing"), cl::init(""), \
328 cl::value_desc("prefix")) \ 328 cl::value_desc("prefix")) \
329 \ 329 \
330 X(TestStackExtra, uint32_t, dev_opt_flag, "test-stack-extra", \ 330 X(TestStackExtra, uint32_t, dev_opt_flag, "test-stack-extra", \
331 cl::desc("Extra amount of stack to add to the " \ 331 cl::desc("Extra amount of stack to add to the " \
332 "frame in bytes (for testing)."), \ 332 "frame in bytes (for testing)."), \
333 cl::init(0)) \ 333 cl::init(0)) \
334 \ 334 \
(...skipping 46 matching lines...) Expand 10 before | Expand all | Expand 10 after
381 clEnumValN(Ice::IceV_AvailableRegs, "registers", \ 381 clEnumValN(Ice::IceV_AvailableRegs, "registers", \
382 "Show available registers for register allocation"), \ 382 "Show available registers for register allocation"), \
383 clEnumValN(Ice::IceV_GlobalInit, "global_init", \ 383 clEnumValN(Ice::IceV_GlobalInit, "global_init", \
384 "Global initializers"), \ 384 "Global initializers"), \
385 clEnumValN(Ice::IceV_ConstPoolStats, "cpool", \ 385 clEnumValN(Ice::IceV_ConstPoolStats, "cpool", \
386 "Constant pool counters"), \ 386 "Constant pool counters"), \
387 clEnumValN(Ice::IceV_Wasm, "wasm", "WebAssembly builder"), \ 387 clEnumValN(Ice::IceV_Wasm, "wasm", "WebAssembly builder"), \
388 clEnumValN(Ice::IceV_All, "all", "Use all verbose options"), \ 388 clEnumValN(Ice::IceV_All, "all", "Use all verbose options"), \
389 clEnumValN(Ice::IceV_Most, "most", \ 389 clEnumValN(Ice::IceV_Most, "most", \
390 "Use all verbose options except 'regalloc,global_init'"), \ 390 "Use all verbose options except 'regalloc,global_init'"), \
391 clEnumValN(Ice::IceV_None, "none", "No verbosity"), clEnumValEnd)) \ 391 clEnumValN(Ice::IceV_None, "none", "No verbosity") CLENUMVALEND)) \
392 \ 392 \
393 X(VerboseFocusOnString, std::string, dev_opt_flag, "verbose-focus", \ 393 X(VerboseFocusOnString, std::string, dev_opt_flag, "verbose-focus", \
394 cl::desc("Override with -verbose=none except for specified functions"), \ 394 cl::desc("Override with -verbose=none except for specified functions"), \
395 cl::init(":")) \ 395 cl::init(":")) \
396 \ 396 \
397 X(WasmBoundsCheck, bool, dev_opt_flag, "wasm-bounds-check", \ 397 X(WasmBoundsCheck, bool, dev_opt_flag, "wasm-bounds-check", \
398 cl::desc("Add bounds checking code in WASM frontend"), \ 398 cl::desc("Add bounds checking code in WASM frontend"), \
399 cl::init(true)) 399 cl::init(true))
400 400
401 //#define X(Name, Type, ClType, ...) 401 //#define X(Name, Type, ClType, ...)
402 402
403 } // end of namespace Ice 403 } // end of namespace Ice
404 404
405 #endif // SUBZERO_SRC_ICECLFLAGS_DEF 405 #endif // SUBZERO_SRC_ICECLFLAGS_DEF
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