[ARM] Add vcge, vcgt instructions to assembler.

test/cctest/test-disasm-arm.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 1047 matching lines @@
       COMPARE(vrsqrts(q15, q0, q8),
               "f260ef70       vrsqrts.f32 q15, q0, q8");
       COMPARE(vtst(Neon8, q0, q1, q2),
               "f2020854       vtst.i8 q0, q1, q2");
       COMPARE(vtst(Neon16, q1, q2, q8),
               "f2142870       vtst.i16 q1, q2, q8");
       COMPARE(vtst(Neon32, q15, q0, q8),
               "f260e870       vtst.i32 q15, q0, q8");
       COMPARE(vceq(q0, q1, q2),
               "f2020e44       vceq.f32 q0, q1, q2");
+      COMPARE(vcge(q0, q1, q2),
+              "f3020e44       vcge.f32 q0, q1, q2");
+      COMPARE(vcgt(q0, q1, q2),
+              "f3220e44       vcgt.f32 q0, q1, q2");
       COMPARE(vceq(Neon8, q0, q1, q2),
               "f3020854       vceq.i8 q0, q1, q2");
       COMPARE(vceq(Neon16, q1, q2, q8),
               "f3142870       vceq.i16 q1, q2, q8");
       COMPARE(vceq(Neon32, q15, q0, q8),
               "f360e870       vceq.i32 q15, q0, q8");
+      COMPARE(vcge(NeonS8, q0, q1, q2),
+              "f2020354       vcge.s8 q0, q1, q2");
+      COMPARE(vcge(NeonU16, q1, q2, q8),
+              "f3142370       vcge.u16 q1, q2, q8");
+      COMPARE(vcge(NeonS32, q15, q0, q8),
+              "f260e370       vcge.s32 q15, q0, q8");
+      COMPARE(vcgt(NeonS8, q0, q1, q2),
+              "f2020344       vcgt.s8 q0, q1, q2");
+      COMPARE(vcgt(NeonU16, q1, q2, q8),
+              "f3142360       vcgt.u16 q1, q2, q8");
+      COMPARE(vcgt(NeonS32, q15, q0, q8),
+              "f260e360       vcgt.s32 q15, q0, q8");
       COMPARE(vbsl(q0, q1, q2),
               "f3120154       vbsl q0, q1, q2");
       COMPARE(vbsl(q15, q0, q8),
               "f350e170       vbsl q15, q0, q8");
       COMPARE(vext(q15, q0, q8, 3),
               "f2f0e360       vext.8 q15, q0, q8, #3");
       COMPARE(vzip(Neon16, q15, q0),
               "f3f6e1c0       vzip.16 q15, q0");
       COMPARE(vrev64(Neon8, q15, q0),
               "f3f0e040       vrev64.8 q15, q0");
@@ skipping 296 matching lines @@
 
   COMPARE(ldrexb(r0, r1), "e1d10f9f       ldrexb r0, [r1]");
   COMPARE(strexb(r0, r1, r2), "e1c20f91       strexb r0, r1, [r2]");
   COMPARE(ldrexh(r0, r1), "e1f10f9f       ldrexh r0, [r1]");
   COMPARE(strexh(r0, r1, r2), "e1e20f91       strexh r0, r1, [r2]");
   COMPARE(ldrex(r0, r1), "e1910f9f       ldrex r0, [r1]");
   COMPARE(strex(r0, r1, r2), "e1820f91       strex r0, r1, [r2]");
 
   VERIFY_RUN();
 }