third_party/protobuf: Update to HEAD (f52e188fe4)

third_party/protobuf/src/google/protobuf/stubs/atomicops_internals_x86_gcc.h

 // Protocol Buffers - Google's data interchange format
 // Copyright 2012 Google Inc.  All rights reserved.
 // https://developers.google.com/protocol-buffers/
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 // notice, this list of conditions and the following disclaimer.
@@ skipping 101 matching lines @@
 }
 
 inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
   *ptr = value;
 }
 
 #if defined(__x86_64__)
 
 // 64-bit implementations of memory barrier can be simpler, because it
 // "mfence" is guaranteed to exist.
-inline void MemoryBarrier() {
+inline void MemoryBarrierInternal() {
   __asm__ __volatile__("mfence" : : : "memory");
 }
 
 inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
   *ptr = value;
-  MemoryBarrier();
+  MemoryBarrierInternal();
 }
 
 #else
 
-inline void MemoryBarrier() {
+inline void MemoryBarrierInternal() {
   if (AtomicOps_Internalx86CPUFeatures.has_sse2) {
     __asm__ __volatile__("mfence" : : : "memory");
   } else {  // mfence is faster but not present on PIII
     Atomic32 x = 0;
     NoBarrier_AtomicExchange(&x, 0);  // acts as a barrier on PIII
   }
 }
 
 inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
   if (AtomicOps_Internalx86CPUFeatures.has_sse2) {
@@ skipping 17 matching lines @@
 }
 
 inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) {
   Atomic32 value = *ptr;  // An x86 load acts as a acquire barrier.
   // See comments in Atomic64 version of Release_Store(), below.
   ATOMICOPS_COMPILER_BARRIER();
   return value;
 }
 
 inline Atomic32 Release_Load(volatile const Atomic32* ptr) {
-  MemoryBarrier();
+  MemoryBarrierInternal();
   return *ptr;
 }
 
 #if defined(__x86_64__)
 
 // 64-bit low-level operations on 64-bit platform.
 
 inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
                                          Atomic64 old_value,
                                          Atomic64 new_value) {
@@ skipping 36 matching lines @@
   }
   return temp + increment;
 }
 
 inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) {
   *ptr = value;
 }
 
 inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) {
   *ptr = value;
-  MemoryBarrier();
+  MemoryBarrierInternal();
 }
 
 inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
   ATOMICOPS_COMPILER_BARRIER();
 
   *ptr = value;  // An x86 store acts as a release barrier
                  // for current AMD/Intel chips as of Jan 2008.
                  // See also Acquire_Load(), below.
 
   // When new chips come out, check:
@@ skipping 16 matching lines @@
 
 inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {
   Atomic64 value = *ptr;  // An x86 load acts as a acquire barrier,
                           // for current AMD/Intel chips as of Jan 2008.
                           // See also Release_Store(), above.
   ATOMICOPS_COMPILER_BARRIER();
   return value;
 }
 
 inline Atomic64 Release_Load(volatile const Atomic64* ptr) {
-  MemoryBarrier();
+  MemoryBarrierInternal();
   return *ptr;
 }
 
 inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
                                        Atomic64 old_value,
                                        Atomic64 new_value) {
   Atomic64 x = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
   if (AtomicOps_Internalx86CPUFeatures.has_amd_lock_mb_bug) {
     __asm__ __volatile__("lfence" : : : "memory");
   }
   return x;
 }
 
 inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
                                        Atomic64 old_value,
                                        Atomic64 new_value) {
   return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
 }
 
 #endif  // defined(__x86_64__)
 
 }  // namespace internal
 }  // namespace protobuf
 }  // namespace google
 
 #undef ATOMICOPS_COMPILER_BARRIER
 
 #endif  // GOOGLE_PROTOBUF_ATOMICOPS_INTERNALS_X86_GCC_H_