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Side by Side Diff: src/IceTargetLoweringX86BaseImpl.h

Issue 2598153002: Subzero: Legalize the movzx argument. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 3 years, 12 months ago
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1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// 1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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1662 if (Ty != IceType_i32 && !(Traits::Is64Bit && Ty == IceType_i64) && 1662 if (Ty != IceType_i32 && !(Traits::Is64Bit && Ty == IceType_i64) &&
1663 (Count3 || Count5 || Count9)) 1663 (Count3 || Count5 || Count9))
1664 return false; 1664 return false;
1665 // Limit the number of lea/shl operations for a single multiply, to a 1665 // Limit the number of lea/shl operations for a single multiply, to a
1666 // somewhat arbitrary choice of 3. 1666 // somewhat arbitrary choice of 3.
1667 constexpr uint32_t MaxOpsForOptimizedMul = 3; 1667 constexpr uint32_t MaxOpsForOptimizedMul = 3;
1668 if (CountOps > MaxOpsForOptimizedMul) 1668 if (CountOps > MaxOpsForOptimizedMul)
1669 return false; 1669 return false;
1670 Variable *T = makeReg(Traits::WordType); 1670 Variable *T = makeReg(Traits::WordType);
1671 if (typeWidthInBytes(Src0->getType()) < typeWidthInBytes(T->getType())) { 1671 if (typeWidthInBytes(Src0->getType()) < typeWidthInBytes(T->getType())) {
1672 _movzx(T, Src0); 1672 Operand *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem);
1673 _movzx(T, Src0RM);
1673 } else { 1674 } else {
1674 _mov(T, Src0); 1675 _mov(T, Src0);
1675 } 1676 }
1676 Constant *Zero = Ctx->getConstantZero(IceType_i32); 1677 Constant *Zero = Ctx->getConstantZero(IceType_i32);
1677 for (uint32_t i = 0; i < Count9; ++i) { 1678 for (uint32_t i = 0; i < Count9; ++i) {
1678 constexpr uint16_t Shift = 3; // log2(9-1) 1679 constexpr uint16_t Shift = 3; // log2(9-1)
1679 _lea(T, X86OperandMem::create(Func, IceType_void, T, Zero, T, Shift)); 1680 _lea(T, X86OperandMem::create(Func, IceType_void, T, Zero, T, Shift));
1680 } 1681 }
1681 for (uint32_t i = 0; i < Count5; ++i) { 1682 for (uint32_t i = 0; i < Count5; ++i) {
1682 constexpr uint16_t Shift = 2; // log2(5-1) 1683 constexpr uint16_t Shift = 2; // log2(5-1)
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4199 4200
4200 if (!Traits::Is64Bit) { 4201 if (!Traits::Is64Bit) {
4201 T = Dest; 4202 T = Dest;
4202 } else { 4203 } else {
4203 T = makeReg(IceType_i64); 4204 T = makeReg(IceType_i64);
4204 if (ValTy == IceType_i32) { 4205 if (ValTy == IceType_i32) {
4205 // in x86-64, __popcountsi2 is not defined, so we cheat a bit by 4206 // in x86-64, __popcountsi2 is not defined, so we cheat a bit by
4206 // converting it to a 64-bit value, and using ctpop_i64. _movzx should 4207 // converting it to a 64-bit value, and using ctpop_i64. _movzx should
4207 // ensure we will not have any bits set on Val's upper 32 bits. 4208 // ensure we will not have any bits set on Val's upper 32 bits.
4208 Variable *V = makeReg(IceType_i64); 4209 Variable *V = makeReg(IceType_i64);
4209 _movzx(V, Val); 4210 Operand *ValRM = legalize(Val, Legal_Reg | Legal_Mem);
4211 _movzx(V, ValRM);
4210 Val = V; 4212 Val = V;
4211 } 4213 }
4212 ValTy = IceType_i64; 4214 ValTy = IceType_i64;
4213 } 4215 }
4214 4216
4215 InstCall *Call = 4217 InstCall *Call =
4216 makeHelperCall(ValTy == IceType_i32 ? RuntimeHelper::H_call_ctpop_i32 4218 makeHelperCall(ValTy == IceType_i32 ? RuntimeHelper::H_call_ctpop_i32
4217 : RuntimeHelper::H_call_ctpop_i64, 4219 : RuntimeHelper::H_call_ctpop_i64,
4218 T, 1); 4220 T, 1);
4219 Call->addArg(Val); 4221 Call->addArg(Val);
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6838 6840
6839 // Make sure the index is a register of the same width as the base 6841 // Make sure the index is a register of the same width as the base
6840 Variable *Index; 6842 Variable *Index;
6841 const Type PointerType = getPointerType(); 6843 const Type PointerType = getPointerType();
6842 if (RangeIndex->getType() != PointerType) { 6844 if (RangeIndex->getType() != PointerType) {
6843 Index = makeReg(PointerType); 6845 Index = makeReg(PointerType);
6844 if (RangeIndex->getType() == IceType_i64) { 6846 if (RangeIndex->getType() == IceType_i64) {
6845 assert(Traits::Is64Bit); 6847 assert(Traits::Is64Bit);
6846 _mov(Index, RangeIndex); // trunc 6848 _mov(Index, RangeIndex); // trunc
6847 } else { 6849 } else {
6848 _movzx(Index, RangeIndex); 6850 Operand *RangeIndexRM = legalize(RangeIndex, Legal_Reg | Legal_Mem);
6851 _movzx(Index, RangeIndexRM);
6849 } 6852 }
6850 } else { 6853 } else {
6851 Index = legalizeToReg(RangeIndex); 6854 Index = legalizeToReg(RangeIndex);
6852 } 6855 }
6853 6856
6854 constexpr RelocOffsetT RelocOffset = 0; 6857 constexpr RelocOffsetT RelocOffset = 0;
6855 constexpr Variable *NoBase = nullptr; 6858 constexpr Variable *NoBase = nullptr;
6856 constexpr Constant *NoOffset = nullptr; 6859 constexpr Constant *NoOffset = nullptr;
6857 auto JTName = GlobalString::createWithString(Ctx, JumpTable->getName()); 6860 auto JTName = GlobalString::createWithString(Ctx, JumpTable->getName());
6858 Constant *Offset = Ctx->getConstantSym(RelocOffset, JTName); 6861 Constant *Offset = Ctx->getConstantSym(RelocOffset, JTName);
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8413 emitGlobal(*Var, SectionSuffix); 8416 emitGlobal(*Var, SectionSuffix);
8414 } 8417 }
8415 } 8418 }
8416 } break; 8419 } break;
8417 } 8420 }
8418 } 8421 }
8419 } // end of namespace X86NAMESPACE 8422 } // end of namespace X86NAMESPACE
8420 } // end of namespace Ice 8423 } // end of namespace Ice
8421 8424
8422 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H 8425 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H
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