Libyuv MIPS DSPR2 optimizations.

source/convert_from.cc

Index: source/convert_from.cc
diff --git a/source/convert_from.cc b/source/convert_from.cc
index ddfa3b3848f95a72b665a182a87bfbd0c4e5d0d8..e6ff52439dae7d992b93533ae301371a2ce0a9ee 100644
--- a/source/convert_from.cc
+++ b/source/convert_from.cc
@@ -708,6 +708,14 @@ int I420ToARGB1555(const uint8* src_y,
     }
   }
 #endif
+#if defined(HAS_I422TOARGB1555ROW_DSPR2)
+  if (TestCpuFlag(kCpuHasDSPR2)) {
+    I422ToARGB1555Row = I422ToARGB1555Row_Any_DSPR2;
+    if (IS_ALIGNED(width, 4)) {
+      I422ToARGB1555Row = I422ToARGB1555Row_DSPR2;
+    }
+  }
+#endif
 #if defined(HAS_I422TOARGB1555ROW_MSA)
   if (TestCpuFlag(kCpuHasMSA)) {
     I422ToARGB1555Row = I422ToARGB1555Row_Any_MSA;
@@ -781,6 +789,14 @@ int I420ToARGB4444(const uint8* src_y,
     }
   }
 #endif
+#if defined(HAS_I422TOARGB4444ROW_DSPR2)
+  if (TestCpuFlag(kCpuHasDSPR2)) {
+    I422ToARGB4444Row = I422ToARGB4444Row_Any_DSPR2;
+    if (IS_ALIGNED(width, 4)) {
+      I422ToARGB4444Row = I422ToARGB4444Row_DSPR2;
+    }
+  }
+#endif
 #if defined(HAS_I422TOARGB4444ROW_MSA)
   if (TestCpuFlag(kCpuHasMSA)) {
     I422ToARGB4444Row = I422ToARGB4444Row_Any_MSA;