[Turbofan] Add native ARM support for Simd Float32x4 operations.

src/compiler/instruction-selector.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector.h"
 
 #include <limits>
 
 #include "src/base/adapters.h"
 #include "src/compiler/compiler-source-position-table.h"
@@ skipping 1430 matching lines @@
     case IrOpcode::kCreateFloat32x4:
       return MarkAsSimd128(node), VisitCreateFloat32x4(node);
     case IrOpcode::kFloat32x4ExtractLane:
       return MarkAsFloat32(node), VisitFloat32x4ExtractLane(node);
     case IrOpcode::kFloat32x4ReplaceLane:
       return MarkAsSimd128(node), VisitFloat32x4ReplaceLane(node);
     case IrOpcode::kFloat32x4FromInt32x4:
       return MarkAsSimd128(node), VisitFloat32x4FromInt32x4(node);
     case IrOpcode::kFloat32x4FromUint32x4:
       return MarkAsSimd128(node), VisitFloat32x4FromUint32x4(node);
+    case IrOpcode::kFloat32x4Abs:
+      return MarkAsSimd128(node), VisitFloat32x4Abs(node);
+    case IrOpcode::kFloat32x4Neg:
+      return MarkAsSimd128(node), VisitFloat32x4Neg(node);
     case IrOpcode::kFloat32x4Add:
       return MarkAsSimd128(node), VisitFloat32x4Add(node);
     case IrOpcode::kFloat32x4Sub:
       return MarkAsSimd128(node), VisitFloat32x4Sub(node);
+    case IrOpcode::kFloat32x4Equal:
+      return MarkAsSimd128(node), VisitFloat32x4Equal(node);
+    case IrOpcode::kFloat32x4NotEqual:
+      return MarkAsSimd128(node), VisitFloat32x4NotEqual(node);
     case IrOpcode::kCreateInt32x4:
       return MarkAsSimd128(node), VisitCreateInt32x4(node);
     case IrOpcode::kInt32x4ExtractLane:
       return MarkAsWord32(node), VisitInt32x4ExtractLane(node);
     case IrOpcode::kInt32x4ReplaceLane:
       return MarkAsSimd128(node), VisitInt32x4ReplaceLane(node);
     case IrOpcode::kInt32x4FromFloat32x4:
       return MarkAsSimd128(node), VisitInt32x4FromFloat32x4(node);
     case IrOpcode::kUint32x4FromFloat32x4:
       return MarkAsSimd128(node), VisitUint32x4FromFloat32x4(node);
@@ skipping 363 matching lines @@
 }
 
 void InstructionSelector::VisitFloat32x4FromInt32x4(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitFloat32x4FromUint32x4(Node* node) {
   UNIMPLEMENTED();
 }
 
+void InstructionSelector::VisitFloat32x4Abs(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitFloat32x4Neg(Node* node) { UNIMPLEMENTED(); }
+
 void InstructionSelector::VisitFloat32x4Add(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitFloat32x4Sub(Node* node) { UNIMPLEMENTED(); }
 
+void InstructionSelector::VisitFloat32x4Equal(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitFloat32x4NotEqual(Node* node) {
+  UNIMPLEMENTED();
+}
+
 void InstructionSelector::VisitInt32x4FromFloat32x4(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitUint32x4FromFloat32x4(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitInt32x4Equal(Node* node) { UNIMPLEMENTED(); }
 
@@ skipping 382 matching lines @@
   return new (instruction_zone()) FrameStateDescriptor(
       instruction_zone(), state_info.type(), state_info.bailout_id(),
       state_info.state_combine(), parameters, locals, stack,
       state_info.shared_info(), outer_state);
 }
 
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8