[Turbofan] Add native ARM support for Simd Float32x4 operations.

src/compiler/arm/instruction-scheduler-arm.cc

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-scheduler.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
 
@@ skipping 95 matching lines @@
     case kArmFloat32Max:
     case kArmFloat64Max:
     case kArmFloat32Min:
     case kArmFloat64Min:
     case kArmFloat64SilenceNaN:
     case kArmFloat32x4Splat:
     case kArmFloat32x4ExtractLane:
     case kArmFloat32x4ReplaceLane:
     case kArmFloat32x4FromInt32x4:
     case kArmFloat32x4FromUint32x4:
+    case kArmFloat32x4Abs:
+    case kArmFloat32x4Neg:
     case kArmFloat32x4Add:
     case kArmFloat32x4Sub:
+    case kArmFloat32x4Eq:
+    case kArmFloat32x4Ne:
     case kArmInt32x4Splat:
     case kArmInt32x4ExtractLane:
     case kArmInt32x4ReplaceLane:
     case kArmInt32x4FromFloat32x4:
     case kArmUint32x4FromFloat32x4:
     case kArmInt32x4Add:
     case kArmInt32x4Sub:
     case kArmInt32x4Eq:
     case kArmInt32x4Ne:
     case kArmSimd32x4Select:
@@ skipping 30 matching lines @@
 
 
 int InstructionScheduler::GetInstructionLatency(const Instruction* instr) {
   // TODO(all): Add instruction cost modeling.
   return 1;
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8