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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
| 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
| 7 | 7 |
| 8 namespace v8 { | 8 namespace v8 { |
| 9 namespace internal { | 9 namespace internal { |
| 10 namespace compiler { | 10 namespace compiler { |
| (...skipping 107 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 118 V(ArmStrh) \ | 118 V(ArmStrh) \ |
| 119 V(ArmLdr) \ | 119 V(ArmLdr) \ |
| 120 V(ArmStr) \ | 120 V(ArmStr) \ |
| 121 V(ArmPush) \ | 121 V(ArmPush) \ |
| 122 V(ArmPoke) \ | 122 V(ArmPoke) \ |
| 123 V(ArmFloat32x4Splat) \ | 123 V(ArmFloat32x4Splat) \ |
| 124 V(ArmFloat32x4ExtractLane) \ | 124 V(ArmFloat32x4ExtractLane) \ |
| 125 V(ArmFloat32x4ReplaceLane) \ | 125 V(ArmFloat32x4ReplaceLane) \ |
| 126 V(ArmFloat32x4FromInt32x4) \ | 126 V(ArmFloat32x4FromInt32x4) \ |
| 127 V(ArmFloat32x4FromUint32x4) \ | 127 V(ArmFloat32x4FromUint32x4) \ |
| 128 V(ArmFloat32x4Abs) \ |
| 129 V(ArmFloat32x4Neg) \ |
| 128 V(ArmFloat32x4Add) \ | 130 V(ArmFloat32x4Add) \ |
| 129 V(ArmFloat32x4Sub) \ | 131 V(ArmFloat32x4Sub) \ |
| 132 V(ArmFloat32x4Eq) \ |
| 133 V(ArmFloat32x4Ne) \ |
| 130 V(ArmInt32x4Splat) \ | 134 V(ArmInt32x4Splat) \ |
| 131 V(ArmInt32x4ExtractLane) \ | 135 V(ArmInt32x4ExtractLane) \ |
| 132 V(ArmInt32x4ReplaceLane) \ | 136 V(ArmInt32x4ReplaceLane) \ |
| 133 V(ArmInt32x4FromFloat32x4) \ | 137 V(ArmInt32x4FromFloat32x4) \ |
| 134 V(ArmUint32x4FromFloat32x4) \ | 138 V(ArmUint32x4FromFloat32x4) \ |
| 135 V(ArmInt32x4Add) \ | 139 V(ArmInt32x4Add) \ |
| 136 V(ArmInt32x4Sub) \ | 140 V(ArmInt32x4Sub) \ |
| 137 V(ArmInt32x4Eq) \ | 141 V(ArmInt32x4Eq) \ |
| 138 V(ArmInt32x4Ne) \ | 142 V(ArmInt32x4Ne) \ |
| 139 V(ArmSimd32x4Select) | 143 V(ArmSimd32x4Select) |
| (...skipping 14 matching lines...) Expand all Loading... |
| 154 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ | 158 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ |
| 155 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ | 159 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ |
| 156 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ | 160 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ |
| 157 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ | 161 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ |
| 158 | 162 |
| 159 } // namespace compiler | 163 } // namespace compiler |
| 160 } // namespace internal | 164 } // namespace internal |
| 161 } // namespace v8 | 165 } // namespace v8 |
| 162 | 166 |
| 163 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 167 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
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