MIPS: Fix improper use of odd FP reg on mips32r6

test/cctest/test-macro-assembler-mips.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 507 matching lines @@
   return reinterpret_cast<RET_TYPE>(
       CALL_GENERATED_CODE(isolate, f, x, 0, 0, 0, 0));
 }
 
 TEST(cvt_s_w_Trunc_uw_s) {
   CcTest::InitializeVM();
   FOR_UINT32_INPUTS(i, cvt_trunc_uint32_test_values) {
     uint32_t input = *i;
     auto fn = [](MacroAssembler* masm) {
       __ cvt_s_w(f0, f4);
-      __ Trunc_uw_s(f2, f0, f1);
+      __ Trunc_uw_s(f2, f0, f6);
     };
     CHECK_EQ(static_cast<float>(input), run_Cvt<uint32_t>(input, fn));
   }
 }
 
 TEST(cvt_d_w_Trunc_w_d) {
   CcTest::InitializeVM();
   FOR_INT32_INPUTS(i, cvt_trunc_int32_test_values) {
     int32_t input = *i;
     auto fn = [](MacroAssembler* masm) {
@@ skipping 813 matching lines @@
 
       auto fn_2 = [](MacroAssembler* masm, uint32_t imm) {
         __ Sltu(v0, a0, a1);
       };
       CHECK_EQ(rs < rd, run_Sltu(rs, rd, fn_2));
     }
   }
 }
 
 #undef __