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Side by Side Diff: src/compiler/ppc/code-generator-ppc.cc

Issue 2590543003: PPC: Use optimal seq for atomic load/store (Closed)
Patch Set: Created 4 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/compilation-info.h" 7 #include "src/compilation-info.h"
8 #include "src/compiler/code-generator-impl.h" 8 #include "src/compiler/code-generator-impl.h"
9 #include "src/compiler/gap-resolver.h" 9 #include "src/compiler/gap-resolver.h"
10 #include "src/compiler/node-matchers.h" 10 #include "src/compiler/node-matchers.h"
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757 if (mode == kMode_MRI) { \ 757 if (mode == kMode_MRI) { \
758 __ asm_instr(value, operand); \ 758 __ asm_instr(value, operand); \
759 } else { \ 759 } else { \
760 CleanUInt32(offset); \ 760 CleanUInt32(offset); \
761 __ asm_instrx(value, operand); \ 761 __ asm_instrx(value, operand); \
762 } \ 762 } \
763 __ bind(&done); \ 763 __ bind(&done); \
764 DCHECK_EQ(LeaveRC, i.OutputRCBit()); \ 764 DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
765 } while (0) 765 } while (0)
766 766
767 #define ASSEMBLE_ATOMIC_LOAD_INTEGER(asm_instr, asm_instrx) \ 767 #define ASSEMBLE_ATOMIC_LOAD_INTEGER(asm_instr, asm_instrx) \
768 do { \ 768 do { \
769 Label done; \ 769 Label done; \
770 Register result = i.OutputRegister(); \ 770 Register result = i.OutputRegister(); \
771 AddressingMode mode = kMode_None; \ 771 AddressingMode mode = kMode_None; \
772 MemOperand operand = i.MemoryOperand(&mode); \ 772 MemOperand operand = i.MemoryOperand(&mode); \
773 __ sync(); \ 773 if (mode == kMode_MRI) { \
774 if (mode == kMode_MRI) { \ 774 __ asm_instr(result, operand); \
775 __ asm_instr(result, operand); \ 775 } else { \
776 } else { \ 776 __ asm_instrx(result, operand); \
777 __ asm_instrx(result, operand); \ 777 } \
778 } \ 778 __ lwsync(); \
779 __ bind(&done); \
780 __ cmp(result, result); \
781 __ bne(&done); \
782 __ isync(); \
783 } while (0) 779 } while (0)
784 #define ASSEMBLE_ATOMIC_STORE_INTEGER(asm_instr, asm_instrx) \ 780 #define ASSEMBLE_ATOMIC_STORE_INTEGER(asm_instr, asm_instrx) \
785 do { \ 781 do { \
786 size_t index = 0; \ 782 size_t index = 0; \
787 AddressingMode mode = kMode_None; \ 783 AddressingMode mode = kMode_None; \
788 MemOperand operand = i.MemoryOperand(&mode, &index); \ 784 MemOperand operand = i.MemoryOperand(&mode, &index); \
789 Register value = i.InputRegister(index); \ 785 Register value = i.InputRegister(index); \
790 __ sync(); \ 786 __ lwsync(); \
791 if (mode == kMode_MRI) { \ 787 if (mode == kMode_MRI) { \
792 __ asm_instr(value, operand); \ 788 __ asm_instr(value, operand); \
793 } else { \ 789 } else { \
794 __ asm_instrx(value, operand); \ 790 __ asm_instrx(value, operand); \
795 } \ 791 } \
796 DCHECK_EQ(LeaveRC, i.OutputRCBit()); \ 792 __ sync(); \
793 DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
797 } while (0) 794 } while (0)
798 795
799 void CodeGenerator::AssembleDeconstructFrame() { 796 void CodeGenerator::AssembleDeconstructFrame() {
800 __ LeaveFrame(StackFrame::MANUAL); 797 __ LeaveFrame(StackFrame::MANUAL);
801 } 798 }
802 799
803 void CodeGenerator::AssemblePrepareTailCall() { 800 void CodeGenerator::AssemblePrepareTailCall() {
804 if (frame_access_state()->has_frame()) { 801 if (frame_access_state()->has_frame()) {
805 __ RestoreFrameStateForTailCall(); 802 __ RestoreFrameStateForTailCall();
806 } 803 }
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2480 padding_size -= v8::internal::Assembler::kInstrSize; 2477 padding_size -= v8::internal::Assembler::kInstrSize;
2481 } 2478 }
2482 } 2479 }
2483 } 2480 }
2484 2481
2485 #undef __ 2482 #undef __
2486 2483
2487 } // namespace compiler 2484 } // namespace compiler
2488 } // namespace internal 2485 } // namespace internal
2489 } // namespace v8 2486 } // namespace v8
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