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Side by Side Diff: src/s390/constants-s390.h

Issue 2586503003: s390: cleanup s390 opcode table (Closed)
Patch Set: make nbyteInstruction size as public Created 4 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_S390_CONSTANTS_S390_H_ 5 #ifndef V8_S390_CONSTANTS_S390_H_
6 #define V8_S390_CONSTANTS_S390_H_ 6 #define V8_S390_CONSTANTS_S390_H_
7 7
8 // Get the standard printf format macros for C99 stdint types. 8 // Get the standard printf format macros for C99 stdint types.
9 #ifndef __STDC_FORMAT_MACROS 9 #ifndef __STDC_FORMAT_MACROS
10 #define __STDC_FORMAT_MACROS 10 #define __STDC_FORMAT_MACROS
(...skipping 139 matching lines...) Expand 10 before | Expand all | Expand 10 after
150 150
151 // Instr is merely used by the Assembler to distinguish 32bit integers 151 // Instr is merely used by the Assembler to distinguish 32bit integers
152 // representing instructions from usual 32 bit values. 152 // representing instructions from usual 32 bit values.
153 // Instruction objects are pointers to 32bit values, and provide methods to 153 // Instruction objects are pointers to 32bit values, and provide methods to
154 // access the various ISA fields. 154 // access the various ISA fields.
155 typedef int32_t Instr; 155 typedef int32_t Instr;
156 typedef uint16_t TwoByteInstr; 156 typedef uint16_t TwoByteInstr;
157 typedef uint32_t FourByteInstr; 157 typedef uint32_t FourByteInstr;
158 typedef uint64_t SixByteInstr; 158 typedef uint64_t SixByteInstr;
159 159
160 #define VRR_A_OPCODE_LIST(V) \ 160 #define S390_RSY_A_OPCODE_LIST(V) \
161 V(wfc, WFC, 0xE7CB) /* VECTOR FP COMPARE SCALAR */ \ 161 V(lmg, LMG, 0xEB04) /* type = RSY_A LOAD MULTIPLE (64) */ \
162 V(vcdg, VCDG, 0xE7D3) /* VECTOR FP CONVERT FROM FIXED 64-BIT */ \ 162 V(srag, SRAG, 0xEB0A) /* type = RSY_A SHIFT RIGHT SINGLE (64) */ \
163 V(vcdlg, VCDLG, 0xE7C1) /* VECTOR FP CONVERT FROM LOGICAL 64-BIT */ \ 163 V(slag, SLAG, 0xEB0B) /* type = RSY_A SHIFT LEFT SINGLE (64) */ \
164 V(vcgd, VCGD, 0xE7C2) /* VECTOR FP CONVERT TO FIXED 64-BIT */ \ 164 V(srlg, SRLG, 0xEB0C) /* type = RSY_A SHIFT RIGHT SINGLE LOGICAL (64) */ \
165 V(vclgd, VCLGD, 0xE7C0) /* VECTOR FP CONVERT TO LOGICAL 64-BIT */ \ 165 V(sllg, SLLG, 0xEB0D) /* type = RSY_A SHIFT LEFT SINGLE LOGICAL (64) */ \
166 V(vfi, VFI, 0xE7C7) /* VECTOR LOAD FP INTEGER */ \ 166 V(tracg, TRACG, 0xEB0F) /* type = RSY_A TRACE (64) */ \
167 V(vlde, VLDE, 0xE7C4) /* VECTOR FP LOAD LENGTHENED */ \ 167 V(csy, CSY, 0xEB14) /* type = RSY_A COMPARE AND SWAP (32) */ \
168 V(vled, VLED, 0xE7C5) /* VECTOR FP LOAD ROUNDED */ \ 168 V(rllg, RLLG, 0xEB1C) /* type = RSY_A ROTATE LEFT SINGLE LOGICAL (64) */ \
169 V(vfpso, VFPSO, 0xE7CC) /* VECTOR FP PERFORM SIGN OPERATION */ \ 169 V(rll, RLL, 0xEB1D) /* type = RSY_A ROTATE LEFT SINGLE LOGICAL (32) */ \
170 V(vfsq, VFSQ, 0xE7CE) /* VECTOR FP SQUARE ROOT */ \ 170 V(stmg, STMG, 0xEB24) /* type = RSY_A STORE MULTIPLE (64) */ \
171 V(wfk, WFK, 0xE7CA) /* VECTOR FP COMPARE AND SIGNAL SCALAR */ 171 V(stctg, STCTG, 0xEB25) /* type = RSY_A STORE CONTROL (64) */ \
172 172 V(stmh, STMH, 0xEB26) /* type = RSY_A STORE MULTIPLE HIGH (32) */ \
173 #define VRR_C_OPCODE_LIST(V) \ 173 V(lctlg, LCTLG, 0xEB2F) /* type = RSY_A LOAD CONTROL (64) */ \
174 V(vfa, VFA, 0xE7E3) /* VECTOR FP ADD */ \ 174 V(csg, CSG, 0xEB30) /* type = RSY_A COMPARE AND SWAP (64) */ \
175 V(vfs, VFS, 0xE7E2) /* VECTOR FP SUBTRACT */ \ 175 V(cdsy, CDSY, 0xEB31) /* type = RSY_A COMPARE DOUBLE AND SWAP (32) */ \
176 V(vfm, VFM, 0xE7E7) /* VECTOR FP MULTIPLY */ \ 176 V(cdsg, CDSG, 0xEB3E) /* type = RSY_A COMPARE DOUBLE AND SWAP (64) */ \
177 V(vfd, VFD, 0xE7E5) /* VECTOR FP DIVIDE */ 177 V(bxhg, BXHG, 0xEB44) /* type = RSY_A BRANCH ON INDEX HIGH (64) */ \
178 V(bxleg, BXLEG, 0xEB45) /* type = RSY_A BRANCH ON INDEX LOW OR EQUAL (64) */ \
179 V(ecag, ECAG, 0xEB4C) /* type = RSY_A EXTRACT CPU ATTRIBUTE */ \
180 V(mvclu, MVCLU, 0xEB8E) /* type = RSY_A MOVE LONG UNICODE */ \
181 V(clclu, CLCLU, 0xEB8F) /* type = RSY_A COMPARE LOGICAL LONG UNICODE */ \
182 V(stmy, STMY, 0xEB90) /* type = RSY_A STORE MULTIPLE (32) */ \
183 V(lmh, LMH, 0xEB96) /* type = RSY_A LOAD MULTIPLE HIGH (32) */ \
184 V(lmy, LMY, 0xEB98) /* type = RSY_A LOAD MULTIPLE (32) */ \
185 V(lamy, LAMY, 0xEB9A) /* type = RSY_A LOAD ACCESS MULTIPLE */ \
186 V(stamy, STAMY, 0xEB9B) /* type = RSY_A STORE ACCESS MULTIPLE */ \
187 V(srak, SRAK, 0xEBDC) /* type = RSY_A SHIFT RIGHT SINGLE (32) */ \
188 V(slak, SLAK, 0xEBDD) /* type = RSY_A SHIFT LEFT SINGLE (32) */ \
189 V(srlk, SRLK, 0xEBDE) /* type = RSY_A SHIFT RIGHT SINGLE LOGICAL (32) */ \
190 V(sllk, SLLK, 0xEBDF) /* type = RSY_A SHIFT LEFT SINGLE LOGICAL (32) */ \
191 V(lang, LANG, 0xEBE4) /* type = RSY_A LOAD AND AND (64) */ \
192 V(laog, LAOG, 0xEBE6) /* type = RSY_A LOAD AND OR (64) */ \
193 V(laxg, LAXG, 0xEBE7) /* type = RSY_A LOAD AND EXCLUSIVE OR (64) */ \
194 V(laag, LAAG, 0xEBE8) /* type = RSY_A LOAD AND ADD (64) */ \
195 V(laalg, LAALG, 0xEBEA) /* type = RSY_A LOAD AND ADD LOGICAL (64) */ \
196 V(lan, LAN, 0xEBF4) /* type = RSY_A LOAD AND AND (32) */ \
197 V(lao, LAO, 0xEBF6) /* type = RSY_A LOAD AND OR (32) */ \
198 V(lax, LAX, 0xEBF7) /* type = RSY_A LOAD AND EXCLUSIVE OR (32) */ \
199 V(laa, LAA, 0xEBF8) /* type = RSY_A LOAD AND ADD (32) */ \
200 V(laal, LAAL, 0xEBFA) /* type = RSY_A LOAD AND ADD LOGICAL (32) */
201
202 #define S390_RSY_B_OPCODE_LIST(V) \
203 V(clmh, CLMH, \
204 0xEB20) /* type = RSY_B COMPARE LOGICAL CHAR. UNDER MASK (high) */ \
205 V(clmy, CLMY, \
206 0xEB21) /* type = RSY_B COMPARE LOGICAL CHAR. UNDER MASK (low) */ \
207 V(clt, CLT, 0xEB23) /* type = RSY_B COMPARE LOGICAL AND TRAP (32) */ \
208 V(clgt, CLGT, 0xEB2B) /* type = RSY_B COMPARE LOGICAL AND TRAP (64) */ \
209 V(stcmh, STCMH, \
210 0xEB2C) /* type = RSY_B STORE CHARACTERS UNDER MASK (high) */ \
211 V(stcmy, STCMY, 0xEB2D) /* type = RSY_B STORE CHARACTERS UNDER MASK (low) */ \
212 V(icmh, ICMH, 0xEB80) /* type = RSY_B INSERT CHARACTERS UNDER MASK (high) */ \
213 V(icmy, ICMY, 0xEB81) /* type = RSY_B INSERT CHARACTERS UNDER MASK (low) */ \
214 V(locfh, LOCFH, 0xEBE0) /* type = RSY_B LOAD HIGH ON CONDITION (32) */ \
215 V(stocfh, STOCFH, 0xEBE1) /* type = RSY_B STORE HIGH ON CONDITION */ \
216 V(locg, LOCG, 0xEBE2) /* type = RSY_B LOAD ON CONDITION (64) */ \
217 V(stocg, STOCG, 0xEBE3) /* type = RSY_B STORE ON CONDITION (64) */ \
218 V(loc, LOC, 0xEBF2) /* type = RSY_B LOAD ON CONDITION (32) */ \
219 V(stoc, STOC, 0xEBF3) /* type = RSY_B STORE ON CONDITION (32) */
220
221 #define S390_RXE_OPCODE_LIST(V) \
222 V(lcbb, LCBB, 0xE727) /* type = RXE LOAD COUNT TO BLOCK BOUNDARY */ \
223 V(ldeb, LDEB, 0xED04) /* type = RXE LOAD LENGTHENED (short to long BFP) */ \
224 V(lxdb, LXDB, \
225 0xED05) /* type = RXE LOAD LENGTHENED (long to extended BFP) */ \
226 V(lxeb, LXEB, \
227 0xED06) /* type = RXE LOAD LENGTHENED (short to extended BFP) */ \
228 V(mxdb, MXDB, 0xED07) /* type = RXE MULTIPLY (long to extended BFP) */ \
229 V(keb, KEB, 0xED08) /* type = RXE COMPARE AND SIGNAL (short BFP) */ \
230 V(ceb, CEB, 0xED09) /* type = RXE COMPARE (short BFP) */ \
231 V(aeb, AEB, 0xED0A) /* type = RXE ADD (short BFP) */ \
232 V(seb, SEB, 0xED0B) /* type = RXE SUBTRACT (short BFP) */ \
233 V(mdeb, MDEB, 0xED0C) /* type = RXE MULTIPLY (short to long BFP) */ \
234 V(deb, DEB, 0xED0D) /* type = RXE DIVIDE (short BFP) */ \
235 V(tceb, TCEB, 0xED10) /* type = RXE TEST DATA CLASS (short BFP) */ \
236 V(tcdb, TCDB, 0xED11) /* type = RXE TEST DATA CLASS (long BFP) */ \
237 V(tcxb, TCXB, 0xED12) /* type = RXE TEST DATA CLASS (extended BFP) */ \
238 V(sqeb, SQEB, 0xED14) /* type = RXE SQUARE ROOT (short BFP) */ \
239 V(sqdb, SQDB, 0xED15) /* type = RXE SQUARE ROOT (long BFP) */ \
240 V(meeb, MEEB, 0xED17) /* type = RXE MULTIPLY (short BFP) */ \
241 V(kdb, KDB, 0xED18) /* type = RXE COMPARE AND SIGNAL (long BFP) */ \
242 V(cdb, CDB, 0xED19) /* type = RXE COMPARE (long BFP) */ \
243 V(adb, ADB, 0xED1A) /* type = RXE ADD (long BFP) */ \
244 V(sdb, SDB, 0xED1B) /* type = RXE SUBTRACT (long BFP) */ \
245 V(mdb, MDB, 0xED1C) /* type = RXE MULTIPLY (long BFP) */ \
246 V(ddb, DDB, 0xED1D) /* type = RXE DIVIDE (long BFP) */ \
247 V(lde, LDE, 0xED24) /* type = RXE LOAD LENGTHENED (short to long HFP) */ \
248 V(lxd, LXD, \
249 0xED25) /* type = RXE LOAD LENGTHENED (long to extended HFP) */ \
250 V(lxe, LXE, \
251 0xED26) /* type = RXE LOAD LENGTHENED (short to extended HFP) */ \
252 V(sqe, SQE, 0xED34) /* type = RXE SQUARE ROOT (short HFP) */ \
253 V(sqd, SQD, 0xED35) /* type = RXE SQUARE ROOT (long HFP) */ \
254 V(mee, MEE, 0xED37) /* type = RXE MULTIPLY (short HFP) */ \
255 V(tdcet, TDCET, 0xED50) /* type = RXE TEST DATA CLASS (short DFP) */ \
256 V(tdget, TDGET, 0xED51) /* type = RXE TEST DATA GROUP (short DFP) */ \
257 V(tdcdt, TDCDT, 0xED54) /* type = RXE TEST DATA CLASS (long DFP) */ \
258 V(tdgdt, TDGDT, 0xED55) /* type = RXE TEST DATA GROUP (long DFP) */ \
259 V(tdcxt, TDCXT, 0xED58) /* type = RXE TEST DATA CLASS (extended DFP) */ \
260 V(tdgxt, TDGXT, 0xED59) /* type = RXE TEST DATA GROUP (extended DFP) */
261
262 #define S390_RRF_A_OPCODE_LIST(V) \
263 V(ipte, IPTE, 0xB221) /* type = RRF_A INVALIDATE PAGE TABLE ENTRY */ \
264 V(mdtr, MDTR, 0xB3D0) /* type = RRF_A MULTIPLY (long DFP) */ \
265 V(mdtra, MDTRA, 0xB3D0) /* type = RRF_A MULTIPLY (long DFP) */ \
266 V(ddtr, DDTR, 0xB3D1) /* type = RRF_A DIVIDE (long DFP) */ \
267 V(ddtra, DDTRA, 0xB3D1) /* type = RRF_A DIVIDE (long DFP) */ \
268 V(adtr, ADTR, 0xB3D2) /* type = RRF_A ADD (long DFP) */ \
269 V(adtra, ADTRA, 0xB3D2) /* type = RRF_A ADD (long DFP) */ \
270 V(sdtr, SDTR, 0xB3D3) /* type = RRF_A SUBTRACT (long DFP) */ \
271 V(sdtra, SDTRA, 0xB3D3) /* type = RRF_A SUBTRACT (long DFP) */ \
272 V(mxtr, MXTR, 0xB3D8) /* type = RRF_A MULTIPLY (extended DFP) */ \
273 V(mxtra, MXTRA, 0xB3D8) /* type = RRF_A MULTIPLY (extended DFP) */ \
274 V(dxtr, DXTR, 0xB3D9) /* type = RRF_A DIVIDE (extended DFP) */ \
275 V(dxtra, DXTRA, 0xB3D9) /* type = RRF_A DIVIDE (extended DFP) */ \
276 V(axtr, AXTR, 0xB3DA) /* type = RRF_A ADD (extended DFP) */ \
277 V(axtra, AXTRA, 0xB3DA) /* type = RRF_A ADD (extended DFP) */ \
278 V(sxtr, SXTR, 0xB3DB) /* type = RRF_A SUBTRACT (extended DFP) */ \
279 V(sxtra, SXTRA, 0xB3DB) /* type = RRF_A SUBTRACT (extended DFP) */ \
280 V(ahhhr, AHHHR, 0xB9C8) /* type = RRF_A ADD HIGH (32) */ \
281 V(shhhr, SHHHR, 0xB9C9) /* type = RRF_A SUBTRACT HIGH (32) */ \
282 V(alhhhr, ALHHHR, 0xB9CA) /* type = RRF_A ADD LOGICAL HIGH (32) */ \
283 V(slhhhr, SLHHHR, 0xB9CB) /* type = RRF_A SUBTRACT LOGICAL HIGH (32) */ \
284 V(ahhlr, AHHLR, 0xB9D8) /* type = RRF_A ADD HIGH (32) */ \
285 V(shhlr, SHHLR, 0xB9D9) /* type = RRF_A SUBTRACT HIGH (32) */ \
286 V(alhhlr, ALHHLR, 0xB9DA) /* type = RRF_A ADD LOGICAL HIGH (32) */ \
287 V(slhhlr, SLHHLR, 0xB9DB) /* type = RRF_A SUBTRACT LOGICAL HIGH (32) */ \
288 V(ngrk, NGRK, 0xB9E4) /* type = RRF_A AND (64) */ \
289 V(ogrk, OGRK, 0xB9E6) /* type = RRF_A OR (64) */ \
290 V(xgrk, XGRK, 0xB9E7) /* type = RRF_A EXCLUSIVE OR (64) */ \
291 V(agrk, AGRK, 0xB9E8) /* type = RRF_A ADD (64) */ \
292 V(sgrk, SGRK, 0xB9E9) /* type = RRF_A SUBTRACT (64) */ \
293 V(algrk, ALGRK, 0xB9EA) /* type = RRF_A ADD LOGICAL (64) */ \
294 V(slgrk, SLGRK, 0xB9EB) /* type = RRF_A SUBTRACT LOGICAL (64) */ \
295 V(nrk, NRK, 0xB9F4) /* type = RRF_A AND (32) */ \
296 V(ork, ORK, 0xB9F6) /* type = RRF_A OR (32) */ \
297 V(xrk, XRK, 0xB9F7) /* type = RRF_A EXCLUSIVE OR (32) */ \
298 V(ark, ARK, 0xB9F8) /* type = RRF_A ADD (32) */ \
299 V(srk, SRK, 0xB9F9) /* type = RRF_A SUBTRACT (32) */ \
300 V(alrk, ALRK, 0xB9FA) /* type = RRF_A ADD LOGICAL (32) */ \
301 V(slrk, SLRK, 0xB9FB) /* type = RRF_A SUBTRACT LOGICAL (32) */
302
303 #define S390_RXF_OPCODE_LIST(V) \
304 V(maeb, MAEB, 0xED0E) /* type = RXF MULTIPLY AND ADD (short BFP) */ \
305 V(mseb, MSEB, 0xED0F) /* type = RXF MULTIPLY AND SUBTRACT (short BFP) */ \
306 V(madb, MADB, 0xED1E) /* type = RXF MULTIPLY AND ADD (long BFP) */ \
307 V(msdb, MSDB, 0xED1F) /* type = RXF MULTIPLY AND SUBTRACT (long BFP) */ \
308 V(mae, MAE, 0xED2E) /* type = RXF MULTIPLY AND ADD (short HFP) */ \
309 V(mse, MSE, 0xED2F) /* type = RXF MULTIPLY AND SUBTRACT (short HFP) */ \
310 V(mayl, MAYL, \
311 0xED38) /* type = RXF MULTIPLY AND ADD UNNRM. (long to ext. low HFP) */ \
312 V(myl, MYL, \
313 0xED39) /* type = RXF MULTIPLY UNNORM. (long to ext. low HFP) */ \
314 V(may, MAY, \
315 0xED3A) /* type = RXF MULTIPLY & ADD UNNORMALIZED (long to ext. HFP) */ \
316 V(my, MY, \
317 0xED3B) /* type = RXF MULTIPLY UNNORMALIZED (long to ext. HFP) */ \
318 V(mayh, MAYH, \
319 0xED3C) /* type = RXF MULTIPLY AND ADD UNNRM. (long to ext. high HFP) */ \
320 V(myh, MYH, \
321 0xED3D) /* type = RXF MULTIPLY UNNORM. (long to ext. high HFP) */ \
322 V(mad, MAD, 0xED3E) /* type = RXF MULTIPLY AND ADD (long HFP) */ \
323 V(msd, MSD, 0xED3F) /* type = RXF MULTIPLY AND SUBTRACT (long HFP) */ \
324 V(sldt, SLDT, 0xED40) /* type = RXF SHIFT SIGNIFICAND LEFT (long DFP) */ \
325 V(srdt, SRDT, 0xED41) /* type = RXF SHIFT SIGNIFICAND RIGHT (long DFP) */ \
326 V(slxt, SLXT, \
327 0xED48) /* type = RXF SHIFT SIGNIFICAND LEFT (extended DFP) */ \
328 V(srxt, SRXT, \
329 0xED49) /* type = RXF SHIFT SIGNIFICAND RIGHT (extended DFP) */
330
331 #define S390_IE_OPCODE_LIST(V) \
332 V(niai, NIAI, 0xB2FA) /* type = IE NEXT INSTRUCTION ACCESS INTENT */
333
334 #define S390_RRF_B_OPCODE_LIST(V) \
335 V(diebr, DIEBR, 0xB353) /* type = RRF_B DIVIDE TO INTEGER (short BFP) */ \
336 V(didbr, DIDBR, 0xB35B) /* type = RRF_B DIVIDE TO INTEGER (long BFP) */ \
337 V(cpsdr, CPSDR, 0xB372) /* type = RRF_B COPY SIGN (long) */ \
338 V(qadtr, QADTR, 0xB3F5) /* type = RRF_B QUANTIZE (long DFP) */ \
339 V(iedtr, IEDTR, \
340 0xB3F6) /* type = RRF_B INSERT BIASED EXPONENT (64 to long DFP) */ \
341 V(rrdtr, RRDTR, 0xB3F7) /* type = RRF_B REROUND (long DFP) */ \
342 V(qaxtr, QAXTR, 0xB3FD) /* type = RRF_B QUANTIZE (extended DFP) */ \
343 V(iextr, IEXTR, \
344 0xB3FE) /* type = RRF_B INSERT BIASED EXPONENT (64 to extended DFP) */ \
345 V(rrxtr, RRXTR, 0xB3FF) /* type = RRF_B REROUND (extended DFP) */ \
346 V(kmctr, KMCTR, 0xB92D) /* type = RRF_B CIPHER MESSAGE WITH COUNTER */ \
347 V(idte, IDTE, 0xB98E) /* type = RRF_B INVALIDATE DAT TABLE ENTRY */ \
348 V(crdte, CRDTE, \
349 0xB98F) /* type = RRF_B COMPARE AND REPLACE DAT TABLE ENTRY */ \
350 V(lptea, LPTEA, 0xB9AA) /* type = RRF_B LOAD PAGE TABLE ENTRY ADDRESS */
351
352 #define S390_RRF_C_OPCODE_LIST(V) \
353 V(sske, SSKE, 0xB22B) /* type = RRF_C SET STORAGE KEY EXTENDED */ \
354 V(cuutf, CUUTF, 0xB2A6) /* type = RRF_C CONVERT UNICODE TO UTF-8 */ \
355 V(cu21, CU21, 0xB2A6) /* type = RRF_C CONVERT UTF-16 TO UTF-8 */ \
356 V(cutfu, CUTFU, 0xB2A7) /* type = RRF_C CONVERT UTF-8 TO UNICODE */ \
357 V(cu12, CU12, 0xB2A7) /* type = RRF_C CONVERT UTF-8 TO UTF-16 */ \
358 V(ppa, PPA, 0xB2E8) /* type = RRF_C PERFORM PROCESSOR ASSIST */ \
359 V(cgrt, CGRT, 0xB960) /* type = RRF_C COMPARE AND TRAP (64) */ \
360 V(clgrt, CLGRT, 0xB961) /* type = RRF_C COMPARE LOGICAL AND TRAP (64) */ \
361 V(crt, CRT, 0xB972) /* type = RRF_C COMPARE AND TRAP (32) */ \
362 V(clrt, CLRT, 0xB973) /* type = RRF_C COMPARE LOGICAL AND TRAP (32) */ \
363 V(trtt, TRTT, 0xB990) /* type = RRF_C TRANSLATE TWO TO TWO */ \
364 V(trto, TRTO, 0xB991) /* type = RRF_C TRANSLATE TWO TO ONE */ \
365 V(trot, TROT, 0xB992) /* type = RRF_C TRANSLATE ONE TO TWO */ \
366 V(troo, TROO, 0xB993) /* type = RRF_C TRANSLATE ONE TO ONE */ \
367 V(cu14, CU14, 0xB9B0) /* type = RRF_C CONVERT UTF-8 TO UTF-32 */ \
368 V(cu24, CU24, 0xB9B1) /* type = RRF_C CONVERT UTF-16 TO UTF-32 */ \
369 V(trtre, TRTRE, \
370 0xB9BD) /* type = RRF_C TRANSLATE AND TEST REVERSE EXTENDED */ \
371 V(trte, TRTE, 0xB9BF) /* type = RRF_C TRANSLATE AND TEST EXTENDED */ \
372 V(locfhr, LOCFHR, 0xB9E0) /* type = RRF_C LOAD HIGH ON CONDITION (32) */ \
373 V(locgr, LOCGR, 0xB9E2) /* type = RRF_C LOAD ON CONDITION (64) */ \
374 V(locr, LOCR, 0xB9F2) /* type = RRF_C LOAD ON CONDITION (32) */
375
376 #define S390_MII_OPCODE_LIST(V) \
377 V(bprp, BPRP, 0xC5) /* type = MII BRANCH PREDICTION RELATIVE PRELOAD */
378
379 #define S390_RRF_D_OPCODE_LIST(V) \
380 V(ldetr, LDETR, \
381 0xB3D4) /* type = RRF_D LOAD LENGTHENED (short to long DFP) */ \
382 V(lxdtr, LXDTR, \
383 0xB3DC) /* type = RRF_D LOAD LENGTHENED (long to extended DFP) */ \
384 V(csdtr, CSDTR, \
385 0xB3E3) /* type = RRF_D CONVERT TO SIGNED PACKED (long DFP to 64) */ \
386 V(csxtr, CSXTR, \
387 0xB3EB) /* type = RRF_D CONVERT TO SIGNED PACKED (extended DFP to 128) */
388
389 #define S390_RRF_E_OPCODE_LIST(V) \
390 V(ledbra, LEDBRA, \
391 0xB344) /* type = RRF_E LOAD ROUNDED (long to short BFP) */ \
392 V(ldxbra, LDXBRA, \
393 0xB345) /* type = RRF_E LOAD ROUNDED (extended to long BFP) */ \
394 V(lexbra, LEXBRA, \
395 0xB346) /* type = RRF_E LOAD ROUNDED (extended to short BFP) */ \
396 V(fixbr, FIXBR, 0xB347) /* type = RRF_E LOAD FP INTEGER (extended BFP) */ \
397 V(fixbra, FIXBRA, 0xB347) /* type = RRF_E LOAD FP INTEGER (extended BFP) */ \
398 V(tbedr, TBEDR, \
399 0xB350) /* type = RRF_E CONVERT HFP TO BFP (long to short) */ \
400 V(tbdr, TBDR, 0xB351) /* type = RRF_E CONVERT HFP TO BFP (long) */ \
401 V(fiebr, FIEBR, 0xB357) /* type = RRF_E LOAD FP INTEGER (short BFP) */ \
402 V(fiebra, FIEBRA, 0xB357) /* type = RRF_E LOAD FP INTEGER (short BFP) */ \
403 V(fidbr, FIDBR, 0xB35F) /* type = RRF_E LOAD FP INTEGER (long BFP) */ \
404 V(fidbra, FIDBRA, 0xB35F) /* type = RRF_E LOAD FP INTEGER (long BFP) */ \
405 V(celfbr, CELFBR, \
406 0xB390) /* type = RRF_E CONVERT FROM LOGICAL (32 to short BFP) */ \
407 V(cdlfbr, CDLFBR, \
408 0xB391) /* type = RRF_E CONVERT FROM LOGICAL (32 to long BFP) */ \
409 V(cxlfbr, CXLFBR, \
410 0xB392) /* type = RRF_E CONVERT FROM LOGICAL (32 to extended BFP) */ \
411 V(cefbra, CEFBRA, \
412 0xB394) /* type = RRF_E CONVERT FROM FIXED (32 to short BFP) */ \
413 V(cdfbra, CDFBRA, \
414 0xB395) /* type = RRF_E CONVERT FROM FIXED (32 to long BFP) */ \
415 V(cxfbra, CXFBRA, \
416 0xB396) /* type = RRF_E CONVERT FROM FIXED (32 to extended BFP) */ \
417 V(cfebr, CFEBR, \
418 0xB398) /* type = RRF_E CONVERT TO FIXED (short BFP to 32) */ \
419 V(cfebra, CFEBRA, \
420 0xB398) /* type = RRF_E CONVERT TO FIXED (short BFP to 32) */ \
421 V(cfdbr, CFDBR, 0xB399) /* type = RRF_E CONVERT TO FIXED (long BFP to 32) */ \
422 V(cfdbra, CFDBRA, \
423 0xB399) /* type = RRF_E CONVERT TO FIXED (long BFP to 32) */ \
424 V(cfxbr, CFXBR, \
425 0xB39A) /* type = RRF_E CONVERT TO FIXED (extended BFP to 32) */ \
426 V(cfxbra, CFXBRA, \
427 0xB39A) /* type = RRF_E CONVERT TO FIXED (extended BFP to 32) */ \
428 V(clfebr, CLFEBR, \
429 0xB39C) /* type = RRF_E CONVERT TO LOGICAL (short BFP to 32) */ \
430 V(clfdbr, CLFDBR, \
431 0xB39D) /* type = RRF_E CONVERT TO LOGICAL (long BFP to 32) */ \
432 V(clfxbr, CLFXBR, \
433 0xB39E) /* type = RRF_E CONVERT TO LOGICAL (extended BFP to 32) */ \
434 V(celgbr, CELGBR, \
435 0xB3A0) /* type = RRF_E CONVERT FROM LOGICAL (64 to short BFP) */ \
436 V(cdlgbr, CDLGBR, \
437 0xB3A1) /* type = RRF_E CONVERT FROM LOGICAL (64 to long BFP) */ \
438 V(cxlgbr, CXLGBR, \
439 0xB3A2) /* type = RRF_E CONVERT FROM LOGICAL (64 to extended BFP) */ \
440 V(cegbra, CEGBRA, \
441 0xB3A4) /* type = RRF_E CONVERT FROM FIXED (64 to short BFP) */ \
442 V(cdgbra, CDGBRA, \
443 0xB3A5) /* type = RRF_E CONVERT FROM FIXED (64 to long BFP) */ \
444 V(cxgbra, CXGBRA, \
445 0xB3A6) /* type = RRF_E CONVERT FROM FIXED (64 to extended BFP) */ \
446 V(cgebr, CGEBR, \
447 0xB3A8) /* type = RRF_E CONVERT TO FIXED (short BFP to 64) */ \
448 V(cgebra, CGEBRA, \
449 0xB3A8) /* type = RRF_E CONVERT TO FIXED (short BFP to 64) */ \
450 V(cgdbr, CGDBR, 0xB3A9) /* type = RRF_E CONVERT TO FIXED (long BFP to 64) */ \
451 V(cgdbra, CGDBRA, \
452 0xB3A9) /* type = RRF_E CONVERT TO FIXED (long BFP to 64) */ \
453 V(cgxbr, CGXBR, \
454 0xB3AA) /* type = RRF_E CONVERT TO FIXED (extended BFP to 64) */ \
455 V(cgxbra, CGXBRA, \
456 0xB3AA) /* type = RRF_E CONVERT TO FIXED (extended BFP to 64) */ \
457 V(clgebr, CLGEBR, \
458 0xB3AC) /* type = RRF_E CONVERT TO LOGICAL (short BFP to 64) */ \
459 V(clgdbr, CLGDBR, \
460 0xB3AD) /* type = RRF_E CONVERT TO LOGICAL (long BFP to 64) */ \
461 V(clgxbr, CLGXBR, \
462 0xB3AE) /* type = RRF_E CONVERT TO LOGICAL (extended BFP to 64) */ \
463 V(cfer, CFER, 0xB3B8) /* type = RRF_E CONVERT TO FIXED (short HFP to 32) */ \
464 V(cfdr, CFDR, 0xB3B9) /* type = RRF_E CONVERT TO FIXED (long HFP to 32) */ \
465 V(cfxr, CFXR, \
466 0xB3BA) /* type = RRF_E CONVERT TO FIXED (extended HFP to 32) */ \
467 V(cger, CGER, 0xB3C8) /* type = RRF_E CONVERT TO FIXED (short HFP to 64) */ \
468 V(cgdr, CGDR, 0xB3C9) /* type = RRF_E CONVERT TO FIXED (long HFP to 64) */ \
469 V(cgxr, CGXR, \
470 0xB3CA) /* type = RRF_E CONVERT TO FIXED (extended HFP to 64) */ \
471 V(ledtr, LEDTR, 0xB3D5) /* type = RRF_E LOAD ROUNDED (long to short DFP) */ \
472 V(fidtr, FIDTR, 0xB3D7) /* type = RRF_E LOAD FP INTEGER (long DFP) */ \
473 V(ldxtr, LDXTR, \
474 0xB3DD) /* type = RRF_E LOAD ROUNDED (extended to long DFP) */ \
475 V(fixtr, FIXTR, 0xB3DF) /* type = RRF_E LOAD FP INTEGER (extended DFP) */ \
476 V(cgdtr, CGDTR, 0xB3E1) /* type = RRF_E CONVERT TO FIXED (long DFP to 64) */ \
477 V(cgdtra, CGDTRA, \
478 0xB3E1) /* type = RRF_E CONVERT TO FIXED (long DFP to 64) */ \
479 V(cgxtr, CGXTR, \
480 0xB3E9) /* type = RRF_E CONVERT TO FIXED (extended DFP to 64) */ \
481 V(cgxtra, CGXTRA, \
482 0xB3E9) /* type = RRF_E CONVERT TO FIXED (extended DFP to 64) */ \
483 V(cdgtra, CDGTRA, \
484 0xB3F1) /* type = RRF_E CONVERT FROM FIXED (64 to long DFP) */ \
485 V(cxgtra, CXGTRA, \
486 0xB3F9) /* type = RRF_E CONVERT FROM FIXED (64 to extended DFP) */ \
487 V(cfdtr, CFDTR, 0xB941) /* type = RRF_E CONVERT TO FIXED (long DFP to 32) */ \
488 V(clgdtr, CLGDTR, \
489 0xB942) /* type = RRF_E CONVERT TO LOGICAL (long DFP to 64) */ \
490 V(clfdtr, CLFDTR, \
491 0xB943) /* type = RRF_E CONVERT TO LOGICAL (long DFP to 32) */ \
492 V(cfxtr, CFXTR, \
493 0xB949) /* type = RRF_E CONVERT TO FIXED (extended DFP to 32) */ \
494 V(clgxtr, CLGXTR, \
495 0xB94A) /* type = RRF_E CONVERT TO LOGICAL (extended DFP to 64) */ \
496 V(clfxtr, CLFXTR, \
497 0xB94B) /* type = RRF_E CONVERT TO LOGICAL (extended DFP to 32) */ \
498 V(cdlgtr, CDLGTR, \
499 0xB952) /* type = RRF_E CONVERT FROM LOGICAL (64 to long DFP) */ \
500 V(cdlftr, CDLFTR, \
501 0xB953) /* type = RRF_E CONVERT FROM LOGICAL (32 to long DFP) */ \
502 V(cxlgtr, CXLGTR, \
503 0xB95A) /* type = RRF_E CONVERT FROM LOGICAL (64 to extended DFP) */ \
504 V(cxlftr, CXLFTR, \
505 0xB95B) /* type = RRF_E CONVERT FROM LOGICAL (32 to extended DFP) */
506
507 #define S390_VRR_A_OPCODE_LIST(V) \
508 V(vpopct, VPOPCT, 0xE750) /* type = VRR_A VECTOR POPULATION COUNT */ \
509 V(vctz, VCTZ, 0xE752) /* type = VRR_A VECTOR COUNT TRAILING ZEROS */ \
510 V(vclz, VCLZ, 0xE753) /* type = VRR_A VECTOR COUNT LEADING ZEROS */ \
511 V(vlr, VLR, 0xE756) /* type = VRR_A VECTOR LOAD */ \
512 V(vistr, VISTR, 0xE75C) /* type = VRR_A VECTOR ISOLATE STRING */ \
513 V(vseg, VSEG, 0xE75F) /* type = VRR_A VECTOR SIGN EXTEND TO DOUBLEWORD */ \
514 V(vclgd, VCLGD, \
515 0xE7C0) /* type = VRR_A VECTOR FP CONVERT TO LOGICAL 64-BIT */ \
516 V(vcdlg, VCDLG, \
517 0xE7C1) /* type = VRR_A VECTOR FP CONVERT FROM LOGICAL 64-BIT */ \
518 V(vcgd, VCGD, 0xE7C2) /* type = VRR_A VECTOR FP CONVERT TO FIXED 64-BIT */ \
519 V(vcdg, VCDG, 0xE7C3) /* type = VRR_A VECTOR FP CONVERT FROM FIXED 64-BIT */ \
520 V(vlde, VLDE, 0xE7C4) /* type = VRR_A VECTOR FP LOAD LENGTHENED */ \
521 V(vled, VLED, 0xE7C5) /* type = VRR_A VECTOR FP LOAD ROUNDED */ \
522 V(vfi, VFI, 0xE7C7) /* type = VRR_A VECTOR LOAD FP INTEGER */ \
523 V(wfk, WFK, 0xE7CA) /* type = VRR_A VECTOR FP COMPARE AND SIGNAL SCALAR */ \
524 V(wfc, WFC, 0xE7CB) /* type = VRR_A VECTOR FP COMPARE SCALAR */ \
525 V(vfpso, VFPSO, 0xE7CC) /* type = VRR_A VECTOR FP PERFORM SIGN OPERATION */ \
526 V(vfsq, VFSQ, 0xE7CE) /* type = VRR_A VECTOR FP SQUARE ROOT */ \
527 V(vupll, VUPLL, 0xE7D4) /* type = VRR_A VECTOR UNPACK LOGICAL LOW */ \
528 V(vuplh, VUPLH, 0xE7D5) /* type = VRR_A VECTOR UNPACK LOGICAL HIGH */ \
529 V(vupl, VUPL, 0xE7D6) /* type = VRR_A VECTOR UNPACK LOW */ \
530 V(vuph, VUPH, 0xE7D7) /* type = VRR_A VECTOR UNPACK HIGH */ \
531 V(vtm, VTM, 0xE7D8) /* type = VRR_A VECTOR TEST UNDER MASK */ \
532 V(vecl, VECL, 0xE7D9) /* type = VRR_A VECTOR ELEMENT COMPARE LOGICAL */ \
533 V(vec, VEC, 0xE7DB) /* type = VRR_A VECTOR ELEMENT COMPARE */ \
534 V(vlc, VLC, 0xE7DE) /* type = VRR_A VECTOR LOAD COMPLEMENT */ \
535 V(vlp, VLP, 0xE7DF) /* type = VRR_A VECTOR LOAD POSITIVE */
536
537 #define S390_VRR_B_OPCODE_LIST(V) \
538 V(vfee, VFEE, 0xE780) /* type = VRR_B VECTOR FIND ELEMENT EQUAL */ \
539 V(vfene, VFENE, 0xE781) /* type = VRR_B VECTOR FIND ELEMENT NOT EQUAL */ \
540 V(vfae, VFAE, 0xE782) /* type = VRR_B VECTOR FIND ANY ELEMENT EQUAL */ \
541 V(vpkls, VPKLS, 0xE795) /* type = VRR_B VECTOR PACK LOGICAL SATURATE */ \
542 V(vpks, VPKS, 0xE797) /* type = VRR_B VECTOR PACK SATURATE */ \
543 V(vceq, VCEQ, 0xE7F8) /* type = VRR_B VECTOR COMPARE EQUAL */ \
544 V(vchl, VCHL, 0xE7F9) /* type = VRR_B VECTOR COMPARE HIGH LOGICAL */ \
545 V(vch, VCH, 0xE7FB) /* type = VRR_B VECTOR COMPARE HIGH */
546
547 #define S390_VRR_C_OPCODE_LIST(V) \
548 V(vmrl, VMRL, 0xE760) /* type = VRR_C VECTOR MERGE LOW */ \
549 V(vmrh, VMRH, 0xE761) /* type = VRR_C VECTOR MERGE HIGH */ \
550 V(vsum, VSUM, 0xE764) /* type = VRR_C VECTOR SUM ACROSS WORD */ \
551 V(vsumg, VSUMG, 0xE765) /* type = VRR_C VECTOR SUM ACROSS DOUBLEWORD */ \
552 V(vcksm, VCKSM, 0xE766) /* type = VRR_C VECTOR CHECKSUM */ \
553 V(vsumq, VSUMQ, 0xE767) /* type = VRR_C VECTOR SUM ACROSS QUADWORD */ \
554 V(vn, VN, 0xE768) /* type = VRR_C VECTOR AND */ \
555 V(vnc, VNC, 0xE769) /* type = VRR_C VECTOR AND WITH COMPLEMENT */ \
556 V(vo, VO, 0xE76A) /* type = VRR_C VECTOR OR */ \
557 V(vno, VNO, 0xE76B) /* type = VRR_C VECTOR NOR */ \
558 V(vx, VX, 0xE76D) /* type = VRR_C VECTOR EXCLUSIVE OR */ \
559 V(veslv, VESLV, 0xE770) /* type = VRR_C VECTOR ELEMENT SHIFT LEFT */ \
560 V(verllv, VERLLV, \
561 0xE773) /* type = VRR_C VECTOR ELEMENT ROTATE LEFT LOGICAL */ \
562 V(vsl, VSL, 0xE774) /* type = VRR_C VECTOR SHIFT LEFT */ \
563 V(vslb, VSLB, 0xE775) /* type = VRR_C VECTOR SHIFT LEFT BY BYTE */ \
564 V(vesrlv, VESRLV, \
565 0xE778) /* type = VRR_C VECTOR ELEMENT SHIFT RIGHT LOGICAL */ \
566 V(vesrav, VESRAV, \
567 0xE77A) /* type = VRR_C VECTOR ELEMENT SHIFT RIGHT ARITHMETIC */ \
568 V(vsrl, VSRL, 0xE77C) /* type = VRR_C VECTOR SHIFT RIGHT LOGICAL */ \
569 V(vsrlb, VSRLB, \
570 0xE77D) /* type = VRR_C VECTOR SHIFT RIGHT LOGICAL BY BYTE */ \
571 V(vsra, VSRA, 0xE77E) /* type = VRR_C VECTOR SHIFT RIGHT ARITHMETIC */ \
572 V(vsrab, VSRAB, \
573 0xE77F) /* type = VRR_C VECTOR SHIFT RIGHT ARITHMETIC BY BYTE */ \
574 V(vpdi, VPDI, 0xE784) /* type = VRR_C VECTOR PERMUTE DOUBLEWORD IMMEDIATE */ \
575 V(vpk, VPK, 0xE794) /* type = VRR_C VECTOR PACK */ \
576 V(vmlh, VMLH, 0xE7A1) /* type = VRR_C VECTOR MULTIPLY LOGICAL HIGH */ \
577 V(vml, VML, 0xE7A2) /* type = VRR_C VECTOR MULTIPLY LOW */ \
578 V(vmh, VMH, 0xE7A3) /* type = VRR_C VECTOR MULTIPLY HIGH */ \
579 V(vmle, VMLE, 0xE7A4) /* type = VRR_C VECTOR MULTIPLY LOGICAL EVEN */ \
580 V(vmlo, VMLO, 0xE7A5) /* type = VRR_C VECTOR MULTIPLY LOGICAL ODD */ \
581 V(vme, VME, 0xE7A6) /* type = VRR_C VECTOR MULTIPLY EVEN */ \
582 V(vmo, VMO, 0xE7A7) /* type = VRR_C VECTOR MULTIPLY ODD */ \
583 V(vgfm, VGFM, 0xE7B4) /* type = VRR_C VECTOR GALOIS FIELD MULTIPLY SUM */ \
584 V(vfs, VFS, 0xE7E2) /* type = VRR_C VECTOR FP SUBTRACT */ \
585 V(vfa, VFA, 0xE7E3) /* type = VRR_C VECTOR FP ADD */ \
586 V(vfd, VFD, 0xE7E5) /* type = VRR_C VECTOR FP DIVIDE */ \
587 V(vfm, VFM, 0xE7E7) /* type = VRR_C VECTOR FP MULTIPLY */ \
588 V(vfce, VFCE, 0xE7E8) /* type = VRR_C VECTOR FP COMPARE EQUAL */ \
589 V(vfche, VFCHE, 0xE7EA) /* type = VRR_C VECTOR FP COMPARE HIGH OR EQUAL */ \
590 V(vfch, VFCH, 0xE7EB) /* type = VRR_C VECTOR FP COMPARE HIGH */ \
591 V(vavgl, VAVGL, 0xE7F0) /* type = VRR_C VECTOR AVERAGE LOGICAL */ \
592 V(vacc, VACC, 0xE7F1) /* type = VRR_C VECTOR ADD COMPUTE CARRY */ \
593 V(vavg, VAVG, 0xE7F2) /* type = VRR_C VECTOR AVERAGE */ \
594 V(va, VA, 0xE7F3) /* type = VRR_C VECTOR ADD */ \
595 V(vscbi, VSCBI, \
596 0xE7F5) /* type = VRR_C VECTOR SUBTRACT COMPUTE BORROW INDICATION */ \
597 V(vs, VS, 0xE7F7) /* type = VRR_C VECTOR SUBTRACT */ \
598 V(vmnl, VMNL, 0xE7FC) /* type = VRR_C VECTOR MINIMUM LOGICAL */ \
599 V(vmxl, VMXL, 0xE7FD) /* type = VRR_C VECTOR MAXIMUM LOGICAL */ \
600 V(vmn, VMN, 0xE7FE) /* type = VRR_C VECTOR MINIMUM */ \
601 V(vmx, VMX, 0xE7FF) /* type = VRR_C VECTOR MAXIMUM */
602
603 #define S390_VRI_A_OPCODE_LIST(V) \
604 V(vleib, VLEIB, 0xE740) /* type = VRI_A VECTOR LOAD ELEMENT IMMEDIATE (8) */ \
605 V(vleih, VLEIH, \
606 0xE741) /* type = VRI_A VECTOR LOAD ELEMENT IMMEDIATE (16) */ \
607 V(vleig, VLEIG, \
608 0xE742) /* type = VRI_A VECTOR LOAD ELEMENT IMMEDIATE (64) */ \
609 V(vleif, VLEIF, \
610 0xE743) /* type = VRI_A VECTOR LOAD ELEMENT IMMEDIATE (32) */ \
611 V(vgbm, VGBM, 0xE744) /* type = VRI_A VECTOR GENERATE BYTE MASK */ \
612 V(vrepi, VREPI, 0xE745) /* type = VRI_A VECTOR REPLICATE IMMEDIATE */
613
614 #define S390_VRR_D_OPCODE_LIST(V) \
615 V(vstrc, VSTRC, 0xE78A) /* type = VRR_D VECTOR STRING RANGE COMPARE */ \
616 V(vmalh, VMALH, \
617 0xE7A9) /* type = VRR_D VECTOR MULTIPLY AND ADD LOGICAL HIGH */ \
618 V(vmal, VMAL, 0xE7AA) /* type = VRR_D VECTOR MULTIPLY AND ADD LOW */ \
619 V(vmah, VMAH, 0xE7AB) /* type = VRR_D VECTOR MULTIPLY AND ADD HIGH */ \
620 V(vmale, VMALE, \
621 0xE7AC) /* type = VRR_D VECTOR MULTIPLY AND ADD LOGICAL EVEN */ \
622 V(vmalo, VMALO, \
623 0xE7AD) /* type = VRR_D VECTOR MULTIPLY AND ADD LOGICAL ODD */ \
624 V(vmae, VMAE, 0xE7AE) /* type = VRR_D VECTOR MULTIPLY AND ADD EVEN */ \
625 V(vmao, VMAO, 0xE7AF) /* type = VRR_D VECTOR MULTIPLY AND ADD ODD */ \
626 V(vaccc, VACCC, \
627 0xE7B9) /* type = VRR_D VECTOR ADD WITH CARRY COMPUTE CARRY */ \
628 V(vac, VAC, 0xE7BB) /* type = VRR_D VECTOR ADD WITH CARRY */ \
629 V(vgfma, VGFMA, \
630 0xE7BC) /* type = VRR_D VECTOR GALOIS FIELD MULTIPLY SUM AND ACCUMULATE */ \
631 V(vsbcbi, VSBCBI, 0xE7BD) /* type = VRR_D VECTOR SUBTRACT WITH BORROW */ \
632 /* COMPUTE BORROW INDICATION */ \
633 V(vsbi, VSBI, \
634 0xE7BF) /* type = VRR_D VECTOR SUBTRACT WITH BORROW INDICATION */
635
636 #define S390_VRI_B_OPCODE_LIST(V) \
637 V(vgm, VGM, 0xE746) /* type = VRI_B VECTOR GENERATE MASK */
638
639 #define S390_VRR_E_OPCODE_LIST(V) \
640 V(vperm, VPERM, 0xE78C) /* type = VRR_E VECTOR PERMUTE */ \
641 V(vsel, VSEL, 0xE78D) /* type = VRR_E VECTOR SELECT */ \
642 V(vfms, VFMS, 0xE78E) /* type = VRR_E VECTOR FP MULTIPLY AND SUBTRACT */ \
643 V(vfma, VFMA, 0xE78F) /* type = VRR_E VECTOR FP MULTIPLY AND ADD */
644
645 #define S390_VRI_C_OPCODE_LIST(V) \
646 V(vrep, VREP, 0xE74D) /* type = VRI_C VECTOR REPLICATE */
647
648 #define S390_VRI_D_OPCODE_LIST(V) \
649 V(verim, VERIM, \
650 0xE772) /* type = VRI_D VECTOR ELEMENT ROTATE AND INSERT UNDER MASK */ \
651 V(vsldb, VSLDB, 0xE777) /* type = VRI_D VECTOR SHIFT LEFT DOUBLE BY BYTE */
652
653 #define S390_VRR_F_OPCODE_LIST(V) \
654 V(vlvgp, VLVGP, 0xE762) /* type = VRR_F VECTOR LOAD VR FROM GRS DISJOINT */
655
656 #define S390_RIS_OPCODE_LIST(V) \
657 V(cgib, CGIB, \
658 0xECFC) /* type = RIS COMPARE IMMEDIATE AND BRANCH (64<-8) */ \
659 V(clgib, CLGIB, \
660 0xECFD) /* type = RIS COMPARE LOGICAL IMMEDIATE AND BRANCH (64<-8) */ \
661 V(cib, CIB, 0xECFE) /* type = RIS COMPARE IMMEDIATE AND BRANCH (32<-8) */ \
662 V(clib, CLIB, \
663 0xECFF) /* type = RIS COMPARE LOGICAL IMMEDIATE AND BRANCH (32<-8) */
664
665 #define S390_VRI_E_OPCODE_LIST(V) \
666 V(vftci, VFTCI, \
667 0xE74A) /* type = VRI_E VECTOR FP TEST DATA CLASS IMMEDIATE */
668
669 #define S390_RSL_A_OPCODE_LIST(V) \
670 V(tp, TP, 0xEBC0) /* type = RSL_A TEST DECIMAL */
671
672 #define S390_RSL_B_OPCODE_LIST(V) \
673 V(cpdt, CPDT, 0xEDAC) /* type = RSL_B CONVERT TO PACKED (from long DFP) */ \
674 V(cpxt, CPXT, \
675 0xEDAD) /* type = RSL_B CONVERT TO PACKED (from extended DFP) */ \
676 V(cdpt, CDPT, 0xEDAE) /* type = RSL_B CONVERT FROM PACKED (to long DFP) */ \
677 V(cxpt, CXPT, \
678 0xEDAF) /* type = RSL_B CONVERT FROM PACKED (to extended DFP) */
679
680 #define S390_SI_OPCODE_LIST(V) \
681 V(tm, TM, 0x91) /* type = SI TEST UNDER MASK */ \
682 V(mvi, MVI, 0x92) /* type = SI MOVE (immediate) */ \
683 V(ni, NI, 0x94) /* type = SI AND (immediate) */ \
684 V(cli, CLI, 0x95) /* type = SI COMPARE LOGICAL (immediate) */ \
685 V(oi, OI, 0x96) /* type = SI OR (immediate) */ \
686 V(xi, XI, 0x97) /* type = SI EXCLUSIVE OR (immediate) */ \
687 V(stnsm, STNSM, 0xAC) /* type = SI STORE THEN AND SYSTEM MASK */ \
688 V(stosm, STOSM, 0xAD) /* type = SI STORE THEN OR SYSTEM MASK */ \
689 V(mc, MC, 0xAF) /* type = SI MONITOR CALL */
690
691 #define S390_SIL_OPCODE_LIST(V) \
692 V(mvhhi, MVHHI, 0xE544) /* type = SIL MOVE (16<-16) */ \
693 V(mvghi, MVGHI, 0xE548) /* type = SIL MOVE (64<-16) */ \
694 V(mvhi, MVHI, 0xE54C) /* type = SIL MOVE (32<-16) */ \
695 V(chhsi, CHHSI, \
696 0xE554) /* type = SIL COMPARE HALFWORD IMMEDIATE (16<-16) */ \
697 V(clhhsi, CLHHSI, \
698 0xE555) /* type = SIL COMPARE LOGICAL IMMEDIATE (16<-16) */ \
699 V(cghsi, CGHSI, \
700 0xE558) /* type = SIL COMPARE HALFWORD IMMEDIATE (64<-16) */ \
701 V(clghsi, CLGHSI, \
702 0xE559) /* type = SIL COMPARE LOGICAL IMMEDIATE (64<-16) */ \
703 V(chsi, CHSI, 0xE55C) /* type = SIL COMPARE HALFWORD IMMEDIATE (32<-16) */ \
704 V(clfhsi, CLFHSI, \
705 0xE55D) /* type = SIL COMPARE LOGICAL IMMEDIATE (32<-16) */ \
706 V(tbegin, TBEGIN, \
707 0xE560) /* type = SIL TRANSACTION BEGIN (nonconstrained) */ \
708 V(tbeginc, TBEGINC, \
709 0xE561) /* type = SIL TRANSACTION BEGIN (constrained) */
710
711 #define S390_VRS_A_OPCODE_LIST(V) \
712 V(vesl, VESL, 0xE730) /* type = VRS_A VECTOR ELEMENT SHIFT LEFT */ \
713 V(verll, VERLL, \
714 0xE733) /* type = VRS_A VECTOR ELEMENT ROTATE LEFT LOGICAL */ \
715 V(vlm, VLM, 0xE736) /* type = VRS_A VECTOR LOAD MULTIPLE */ \
716 V(vesrl, VESRL, \
717 0xE738) /* type = VRS_A VECTOR ELEMENT SHIFT RIGHT LOGICAL */ \
718 V(vesra, VESRA, \
719 0xE73A) /* type = VRS_A VECTOR ELEMENT SHIFT RIGHT ARITHMETIC */ \
720 V(vstm, VSTM, 0xE73E) /* type = VRS_A VECTOR STORE MULTIPLE */
721
722 #define S390_RIL_A_OPCODE_LIST(V) \
723 V(lgfi, LGFI, 0xC01) /* type = RIL_A LOAD IMMEDIATE (64<-32) */ \
724 V(xihf, XIHF, 0xC06) /* type = RIL_A EXCLUSIVE OR IMMEDIATE (high) */ \
725 V(xilf, XILF, 0xC07) /* type = RIL_A EXCLUSIVE OR IMMEDIATE (low) */ \
726 V(iihf, IIHF, 0xC08) /* type = RIL_A INSERT IMMEDIATE (high) */ \
727 V(iilf, IILF, 0xC09) /* type = RIL_A INSERT IMMEDIATE (low) */ \
728 V(nihf, NIHF, 0xC0A) /* type = RIL_A AND IMMEDIATE (high) */ \
729 V(nilf, NILF, 0xC0B) /* type = RIL_A AND IMMEDIATE (low) */ \
730 V(oihf, OIHF, 0xC0C) /* type = RIL_A OR IMMEDIATE (high) */ \
731 V(oilf, OILF, 0xC0D) /* type = RIL_A OR IMMEDIATE (low) */ \
732 V(llihf, LLIHF, 0xC0E) /* type = RIL_A LOAD LOGICAL IMMEDIATE (high) */ \
733 V(llilf, LLILF, 0xC0F) /* type = RIL_A LOAD LOGICAL IMMEDIATE (low) */ \
734 V(msgfi, MSGFI, 0xC20) /* type = RIL_A MULTIPLY SINGLE IMMEDIATE (64<-32) */ \
735 V(msfi, MSFI, 0xC21) /* type = RIL_A MULTIPLY SINGLE IMMEDIATE (32) */ \
736 V(slgfi, SLGFI, \
737 0xC24) /* type = RIL_A SUBTRACT LOGICAL IMMEDIATE (64<-32) */ \
738 V(slfi, SLFI, 0xC25) /* type = RIL_A SUBTRACT LOGICAL IMMEDIATE (32) */ \
739 V(agfi, AGFI, 0xC28) /* type = RIL_A ADD IMMEDIATE (64<-32) */ \
740 V(afi, AFI, 0xC29) /* type = RIL_A ADD IMMEDIATE (32) */ \
741 V(algfi, ALGFI, 0xC2A) /* type = RIL_A ADD LOGICAL IMMEDIATE (64<-32) */ \
742 V(alfi, ALFI, 0xC2B) /* type = RIL_A ADD LOGICAL IMMEDIATE (32) */ \
743 V(cgfi, CGFI, 0xC2C) /* type = RIL_A COMPARE IMMEDIATE (64<-32) */ \
744 V(cfi, CFI, 0xC2D) /* type = RIL_A COMPARE IMMEDIATE (32) */ \
745 V(clgfi, CLGFI, 0xC2E) /* type = RIL_A COMPARE LOGICAL IMMEDIATE (64<-32) */ \
746 V(clfi, CLFI, 0xC2F) /* type = RIL_A COMPARE LOGICAL IMMEDIATE (32) */ \
747 V(aih, AIH, 0xCC8) /* type = RIL_A ADD IMMEDIATE HIGH (32) */ \
748 V(alsih, ALSIH, \
749 0xCCA) /* type = RIL_A ADD LOGICAL WITH SIGNED IMMEDIATE HIGH (32) */ \
750 V(alsihn, ALSIHN, \
751 0xCCB) /* type = RIL_A ADD LOGICAL WITH SIGNED IMMEDIATE HIGH (32) */ \
752 V(cih, CIH, 0xCCD) /* type = RIL_A COMPARE IMMEDIATE HIGH (32) */ \
753 V(clih, CLIH, 0xCCF) /* type = RIL_A COMPARE LOGICAL IMMEDIATE HIGH (32) */
754
755 #define S390_RIL_B_OPCODE_LIST(V) \
756 V(larl, LARL, 0xC00) /* type = RIL_B LOAD ADDRESS RELATIVE LONG */ \
757 V(brasl, BRASL, 0xC05) /* type = RIL_B BRANCH RELATIVE AND SAVE LONG */ \
758 V(llhrl, LLHRL, \
759 0xC42) /* type = RIL_B LOAD LOGICAL HALFWORD RELATIVE LONG (32<-16) */ \
760 V(lghrl, LGHRL, \
761 0xC44) /* type = RIL_B LOAD HALFWORD RELATIVE LONG (64<-16) */ \
762 V(lhrl, LHRL, 0xC45) /* type = RIL_B LOAD HALFWORD RELATIVE LONG (32<-16) */ \
763 V(llghrl, LLGHRL, \
764 0xC46) /* type = RIL_B LOAD LOGICAL HALFWORD RELATIVE LONG (64<-16) */ \
765 V(sthrl, STHRL, 0xC47) /* type = RIL_B STORE HALFWORD RELATIVE LONG (16) */ \
766 V(lgrl, LGRL, 0xC48) /* type = RIL_B LOAD RELATIVE LONG (64) */ \
767 V(stgrl, STGRL, 0xC4B) /* type = RIL_B STORE RELATIVE LONG (64) */ \
768 V(lgfrl, LGFRL, 0xC4C) /* type = RIL_B LOAD RELATIVE LONG (64<-32) */ \
769 V(lrl, LRL, 0xC4D) /* type = RIL_B LOAD RELATIVE LONG (32) */ \
770 V(llgfrl, LLGFRL, \
771 0xC4E) /* type = RIL_B LOAD LOGICAL RELATIVE LONG (64<-32) */ \
772 V(strl, STRL, 0xC4F) /* type = RIL_B STORE RELATIVE LONG (32) */ \
773 V(exrl, EXRL, 0xC60) /* type = RIL_B EXECUTE RELATIVE LONG */ \
774 V(cghrl, CGHRL, \
775 0xC64) /* type = RIL_B COMPARE HALFWORD RELATIVE LONG (64<-16) */ \
776 V(chrl, CHRL, \
777 0xC65) /* type = RIL_B COMPARE HALFWORD RELATIVE LONG (32<-16) */ \
778 V(clghrl, CLGHRL, \
779 0xC66) /* type = RIL_B COMPARE LOGICAL RELATIVE LONG (64<-16) */ \
780 V(clhrl, CLHRL, \
781 0xC67) /* type = RIL_B COMPARE LOGICAL RELATIVE LONG (32<-16) */ \
782 V(cgrl, CGRL, 0xC68) /* type = RIL_B COMPARE RELATIVE LONG (64) */ \
783 V(clgrl, CLGRL, 0xC6A) /* type = RIL_B COMPARE LOGICAL RELATIVE LONG (64) */ \
784 V(cgfrl, CGFRL, 0xC6C) /* type = RIL_B COMPARE RELATIVE LONG (64<-32) */ \
785 V(crl, CRL, 0xC6D) /* type = RIL_B COMPARE RELATIVE LONG (32) */ \
786 V(clgfrl, CLGFRL, \
787 0xC6E) /* type = RIL_B COMPARE LOGICAL RELATIVE LONG (64<-32) */ \
788 V(clrl, CLRL, 0xC6F) /* type = RIL_B COMPARE LOGICAL RELATIVE LONG (32) */ \
789 V(brcth, BRCTH, 0xCC6) /* type = RIL_B BRANCH RELATIVE ON COUNT HIGH (32) */
790
791 #define S390_VRS_B_OPCODE_LIST(V) \
792 V(vlvg, VLVG, 0xE722) /* type = VRS_B VECTOR LOAD VR ELEMENT FROM GR */ \
793 V(vll, VLL, 0xE737) /* type = VRS_B VECTOR LOAD WITH LENGTH */ \
794 V(vstl, VSTL, 0xE73F) /* type = VRS_B VECTOR STORE WITH LENGTH */
795
796 #define S390_RIL_C_OPCODE_LIST(V) \
797 V(brcl, BRCL, 0xC04) /* type = RIL_C BRANCH RELATIVE ON CONDITION LONG */ \
798 V(pfdrl, PFDRL, 0xC62) /* type = RIL_C PREFETCH DATA RELATIVE LONG */
799
800 #define S390_VRS_C_OPCODE_LIST(V) \
801 V(vlgv, VLGV, 0xE721) /* type = VRS_C VECTOR LOAD GR FROM VR ELEMENT */
802
803 #define S390_RI_A_OPCODE_LIST(V) \
804 V(iihh, IIHH, 0xA50) /* type = RI_A INSERT IMMEDIATE (high high) */ \
805 V(iihl, IIHL, 0xA51) /* type = RI_A INSERT IMMEDIATE (high low) */ \
806 V(iilh, IILH, 0xA52) /* type = RI_A INSERT IMMEDIATE (low high) */ \
807 V(iill, IILL, 0xA53) /* type = RI_A INSERT IMMEDIATE (low low) */ \
808 V(nihh, NIHH, 0xA54) /* type = RI_A AND IMMEDIATE (high high) */ \
809 V(nihl, NIHL, 0xA55) /* type = RI_A AND IMMEDIATE (high low) */ \
810 V(nilh, NILH, 0xA56) /* type = RI_A AND IMMEDIATE (low high) */ \
811 V(nill, NILL, 0xA57) /* type = RI_A AND IMMEDIATE (low low) */ \
812 V(oihh, OIHH, 0xA58) /* type = RI_A OR IMMEDIATE (high high) */ \
813 V(oihl, OIHL, 0xA59) /* type = RI_A OR IMMEDIATE (high low) */ \
814 V(oilh, OILH, 0xA5A) /* type = RI_A OR IMMEDIATE (low high) */ \
815 V(oill, OILL, 0xA5B) /* type = RI_A OR IMMEDIATE (low low) */ \
816 V(llihh, LLIHH, 0xA5C) /* type = RI_A LOAD LOGICAL IMMEDIATE (high high) */ \
817 V(llihl, LLIHL, 0xA5D) /* type = RI_A LOAD LOGICAL IMMEDIATE (high low) */ \
818 V(llilh, LLILH, 0xA5E) /* type = RI_A LOAD LOGICAL IMMEDIATE (low high) */ \
819 V(llill, LLILL, 0xA5F) /* type = RI_A LOAD LOGICAL IMMEDIATE (low low) */ \
820 V(tmlh, TMLH, 0xA70) /* type = RI_A TEST UNDER MASK (low high) */ \
821 V(tmh, TMH, 0xA70) /* type = RI_A TEST UNDER MASK HIGH */ \
822 V(tmll, TMLL, 0xA71) /* type = RI_A TEST UNDER MASK (low low) */ \
823 V(tml, TML, 0xA71) /* type = RI_A TEST UNDER MASK LOW */ \
824 V(tmhh, TMHH, 0xA72) /* type = RI_A TEST UNDER MASK (high high) */ \
825 V(tmhl, TMHL, 0xA73) /* type = RI_A TEST UNDER MASK (high low) */ \
826 V(lhi, LHI, 0xA78) /* type = RI_A LOAD HALFWORD IMMEDIATE (32)<-16 */ \
827 V(lghi, LGHI, 0xA79) /* type = RI_A LOAD HALFWORD IMMEDIATE (64<-16) */ \
828 V(ahi, AHI, 0xA7A) /* type = RI_A ADD HALFWORD IMMEDIATE (32<-16) */ \
829 V(aghi, AGHI, 0xA7B) /* type = RI_A ADD HALFWORD IMMEDIATE (64<-16) */ \
830 V(mhi, MHI, 0xA7C) /* type = RI_A MULTIPLY HALFWORD IMMEDIATE (32<-16) */ \
831 V(mghi, MGHI, 0xA7D) /* type = RI_A MULTIPLY HALFWORD IMMEDIATE (64<-16) */ \
832 V(chi, CHI, 0xA7E) /* type = RI_A COMPARE HALFWORD IMMEDIATE (32<-16) */ \
833 V(cghi, CGHI, 0xA7F) /* type = RI_A COMPARE HALFWORD IMMEDIATE (64<-16) */
834
835 #define S390_RSI_OPCODE_LIST(V) \
836 V(brxh, BRXH, 0x84) /* type = RSI BRANCH RELATIVE ON INDEX HIGH (32) */ \
837 V(brxle, BRXLE, \
838 0x85) /* type = RSI BRANCH RELATIVE ON INDEX LOW OR EQ. (32) */
839
840 #define S390_RI_B_OPCODE_LIST(V) \
841 V(bras, BRAS, 0xA75) /* type = RI_B BRANCH RELATIVE AND SAVE */ \
842 V(brct, BRCT, 0xA76) /* type = RI_B BRANCH RELATIVE ON COUNT (32) */ \
843 V(brctg, BRCTG, 0xA77) /* type = RI_B BRANCH RELATIVE ON COUNT (64) */
844
845 #define S390_RI_C_OPCODE_LIST(V) \
846 V(brc, BRC, 0xA74) /* type = RI_C BRANCH RELATIVE ON CONDITION */
847
848 #define S390_RSL_OPCODE_LIST(V) \
849 V(czdt, CZDT, 0xEDA8) /* type = RSL CONVERT TO ZONED (from long DFP) */ \
850 V(czxt, CZXT, 0xEDA9) /* type = RSL CONVERT TO ZONED (from extended DFP) */ \
851 V(cdzt, CDZT, 0xEDAA) /* type = RSL CONVERT FROM ZONED (to long DFP) */ \
852 V(cxzt, CXZT, 0xEDAB) /* type = RSL CONVERT FROM ZONED (to extended DFP) */
853
854 #define S390_SMI_OPCODE_LIST(V) \
855 V(bpp, BPP, 0xC7) /* type = SMI BRANCH PREDICTION PRELOAD */
856
857 #define S390_RXY_A_OPCODE_LIST(V) \
858 V(ltg, LTG, 0xE302) /* type = RXY_A LOAD AND TEST (64) */ \
859 V(lrag, LRAG, 0xE303) /* type = RXY_A LOAD REAL ADDRESS (64) */ \
860 V(lg, LG, 0xE304) /* type = RXY_A LOAD (64) */ \
861 V(cvby, CVBY, 0xE306) /* type = RXY_A CONVERT TO BINARY (32) */ \
862 V(ag, AG, 0xE308) /* type = RXY_A ADD (64) */ \
863 V(sg, SG, 0xE309) /* type = RXY_A SUBTRACT (64) */ \
864 V(alg, ALG, 0xE30A) /* type = RXY_A ADD LOGICAL (64) */ \
865 V(slg, SLG, 0xE30B) /* type = RXY_A SUBTRACT LOGICAL (64) */ \
866 V(msg, MSG, 0xE30C) /* type = RXY_A MULTIPLY SINGLE (64) */ \
867 V(dsg, DSG, 0xE30D) /* type = RXY_A DIVIDE SINGLE (64) */ \
868 V(cvbg, CVBG, 0xE30E) /* type = RXY_A CONVERT TO BINARY (64) */ \
869 V(lrvg, LRVG, 0xE30F) /* type = RXY_A LOAD REVERSED (64) */ \
870 V(lt, LT, 0xE312) /* type = RXY_A LOAD AND TEST (32) */ \
871 V(lray, LRAY, 0xE313) /* type = RXY_A LOAD REAL ADDRESS (32) */ \
872 V(lgf, LGF, 0xE314) /* type = RXY_A LOAD (64<-32) */ \
873 V(lgh, LGH, 0xE315) /* type = RXY_A LOAD HALFWORD (64<-16) */ \
874 V(llgf, LLGF, 0xE316) /* type = RXY_A LOAD LOGICAL (64<-32) */ \
875 V(llgt, LLGT, \
876 0xE317) /* type = RXY_A LOAD LOGICAL THIRTY ONE BITS (64<-31) */ \
877 V(agf, AGF, 0xE318) /* type = RXY_A ADD (64<-32) */ \
878 V(sgf, SGF, 0xE319) /* type = RXY_A SUBTRACT (64<-32) */ \
879 V(algf, ALGF, 0xE31A) /* type = RXY_A ADD LOGICAL (64<-32) */ \
880 V(slgf, SLGF, 0xE31B) /* type = RXY_A SUBTRACT LOGICAL (64<-32) */ \
881 V(msgf, MSGF, 0xE31C) /* type = RXY_A MULTIPLY SINGLE (64<-32) */ \
882 V(dsgf, DSGF, 0xE31D) /* type = RXY_A DIVIDE SINGLE (64<-32) */ \
883 V(lrv, LRV, 0xE31E) /* type = RXY_A LOAD REVERSED (32) */ \
884 V(lrvh, LRVH, 0xE31F) /* type = RXY_A LOAD REVERSED (16) */ \
885 V(cg, CG, 0xE320) /* type = RXY_A COMPARE (64) */ \
886 V(clg, CLG, 0xE321) /* type = RXY_A COMPARE LOGICAL (64) */ \
887 V(stg, STG, 0xE324) /* type = RXY_A STORE (64) */ \
888 V(ntstg, NTSTG, 0xE325) /* type = RXY_A NONTRANSACTIONAL STORE (64) */ \
889 V(cvdy, CVDY, 0xE326) /* type = RXY_A CONVERT TO DECIMAL (32) */ \
890 V(lzrg, LZRG, 0xE32A) /* type = RXY_A LOAD AND ZERO RIGHTMOST BYTE (64) */ \
891 V(cvdg, CVDG, 0xE32E) /* type = RXY_A CONVERT TO DECIMAL (64) */ \
892 V(strvg, STRVG, 0xE32F) /* type = RXY_A STORE REVERSED (64) */ \
893 V(cgf, CGF, 0xE330) /* type = RXY_A COMPARE (64<-32) */ \
894 V(clgf, CLGF, 0xE331) /* type = RXY_A COMPARE LOGICAL (64<-32) */ \
895 V(ltgf, LTGF, 0xE332) /* type = RXY_A LOAD AND TEST (64<-32) */ \
896 V(cgh, CGH, 0xE334) /* type = RXY_A COMPARE HALFWORD (64<-16) */ \
897 V(llzrgf, LLZRGF, \
898 0xE33A) /* type = RXY_A LOAD LOGICAL AND ZERO RIGHTMOST BYTE (64<-32) */ \
899 V(lzrf, LZRF, 0xE33B) /* type = RXY_A LOAD AND ZERO RIGHTMOST BYTE (32) */ \
900 V(strv, STRV, 0xE33E) /* type = RXY_A STORE REVERSED (32) */ \
901 V(strvh, STRVH, 0xE33F) /* type = RXY_A STORE REVERSED (16) */ \
902 V(bctg, BCTG, 0xE346) /* type = RXY_A BRANCH ON COUNT (64) */ \
903 V(sty, STY, 0xE350) /* type = RXY_A STORE (32) */ \
904 V(msy, MSY, 0xE351) /* type = RXY_A MULTIPLY SINGLE (32) */ \
905 V(ny, NY, 0xE354) /* type = RXY_A AND (32) */ \
906 V(cly, CLY, 0xE355) /* type = RXY_A COMPARE LOGICAL (32) */ \
907 V(oy, OY, 0xE356) /* type = RXY_A OR (32) */ \
908 V(xy, XY, 0xE357) /* type = RXY_A EXCLUSIVE OR (32) */ \
909 V(ly, LY, 0xE358) /* type = RXY_A LOAD (32) */ \
910 V(cy, CY, 0xE359) /* type = RXY_A COMPARE (32) */ \
911 V(ay, AY, 0xE35A) /* type = RXY_A ADD (32) */ \
912 V(sy, SY, 0xE35B) /* type = RXY_A SUBTRACT (32) */ \
913 V(mfy, MFY, 0xE35C) /* type = RXY_A MULTIPLY (64<-32) */ \
914 V(aly, ALY, 0xE35E) /* type = RXY_A ADD LOGICAL (32) */ \
915 V(sly, SLY, 0xE35F) /* type = RXY_A SUBTRACT LOGICAL (32) */ \
916 V(sthy, STHY, 0xE370) /* type = RXY_A STORE HALFWORD (16) */ \
917 V(lay, LAY, 0xE371) /* type = RXY_A LOAD ADDRESS */ \
918 V(stcy, STCY, 0xE372) /* type = RXY_A STORE CHARACTER */ \
919 V(icy, ICY, 0xE373) /* type = RXY_A INSERT CHARACTER */ \
920 V(laey, LAEY, 0xE375) /* type = RXY_A LOAD ADDRESS EXTENDED */ \
921 V(lb, LB, 0xE376) /* type = RXY_A LOAD BYTE (32<-8) */ \
922 V(lgb, LGB, 0xE377) /* type = RXY_A LOAD BYTE (64<-8) */ \
923 V(lhy, LHY, 0xE378) /* type = RXY_A LOAD HALFWORD (32)<-16 */ \
924 V(chy, CHY, 0xE379) /* type = RXY_A COMPARE HALFWORD (32<-16) */ \
925 V(ahy, AHY, 0xE37A) /* type = RXY_A ADD HALFWORD (32<-16) */ \
926 V(shy, SHY, 0xE37B) /* type = RXY_A SUBTRACT HALFWORD (32<-16) */ \
927 V(mhy, MHY, 0xE37C) /* type = RXY_A MULTIPLY HALFWORD (32<-16) */ \
928 V(ng, NG, 0xE380) /* type = RXY_A AND (64) */ \
929 V(og, OG, 0xE381) /* type = RXY_A OR (64) */ \
930 V(xg, XG, 0xE382) /* type = RXY_A EXCLUSIVE OR (64) */ \
931 V(lgat, LGAT, 0xE385) /* type = RXY_A LOAD AND TRAP (64) */ \
932 V(mlg, MLG, 0xE386) /* type = RXY_A MULTIPLY LOGICAL (128<-64) */ \
933 V(dlg, DLG, 0xE387) /* type = RXY_A DIVIDE LOGICAL (64<-128) */ \
934 V(alcg, ALCG, 0xE388) /* type = RXY_A ADD LOGICAL WITH CARRY (64) */ \
935 V(slbg, SLBG, 0xE389) /* type = RXY_A SUBTRACT LOGICAL WITH BORROW (64) */ \
936 V(stpq, STPQ, 0xE38E) /* type = RXY_A STORE PAIR TO QUADWORD */ \
937 V(lpq, LPQ, 0xE38F) /* type = RXY_A LOAD PAIR FROM QUADWORD (64&64<-128) */ \
938 V(llgc, LLGC, 0xE390) /* type = RXY_A LOAD LOGICAL CHARACTER (64<-8) */ \
939 V(llgh, LLGH, 0xE391) /* type = RXY_A LOAD LOGICAL HALFWORD (64<-16) */ \
940 V(llc, LLC, 0xE394) /* type = RXY_A LOAD LOGICAL CHARACTER (32<-8) */ \
941 V(llh, LLH, 0xE395) /* type = RXY_A LOAD LOGICAL HALFWORD (32<-16) */ \
942 V(ml, ML, 0xE396) /* type = RXY_A MULTIPLY LOGICAL (64<-32) */ \
943 V(dl, DL, 0xE397) /* type = RXY_A DIVIDE LOGICAL (32<-64) */ \
944 V(alc, ALC, 0xE398) /* type = RXY_A ADD LOGICAL WITH CARRY (32) */ \
945 V(slb, SLB, 0xE399) /* type = RXY_A SUBTRACT LOGICAL WITH BORROW (32) */ \
946 V(llgtat, LLGTAT, \
947 0xE39C) /* type = RXY_A LOAD LOGICAL THIRTY ONE BITS AND TRAP (64<-31) */ \
948 V(llgfat, LLGFAT, 0xE39D) /* type = RXY_A LOAD LOGICAL AND TRAP (64<-32) */ \
949 V(lat, LAT, 0xE39F) /* type = RXY_A LOAD AND TRAP (32L<-32) */ \
950 V(lbh, LBH, 0xE3C0) /* type = RXY_A LOAD BYTE HIGH (32<-8) */ \
951 V(llch, LLCH, 0xE3C2) /* type = RXY_A LOAD LOGICAL CHARACTER HIGH (32<-8) */ \
952 V(stch, STCH, 0xE3C3) /* type = RXY_A STORE CHARACTER HIGH (8) */ \
953 V(lhh, LHH, 0xE3C4) /* type = RXY_A LOAD HALFWORD HIGH (32<-16) */ \
954 V(llhh, LLHH, 0xE3C6) /* type = RXY_A LOAD LOGICAL HALFWORD HIGH (32<-16) */ \
955 V(sthh, STHH, 0xE3C7) /* type = RXY_A STORE HALFWORD HIGH (16) */ \
956 V(lfhat, LFHAT, 0xE3C8) /* type = RXY_A LOAD HIGH AND TRAP (32H<-32) */ \
957 V(lfh, LFH, 0xE3CA) /* type = RXY_A LOAD HIGH (32) */ \
958 V(stfh, STFH, 0xE3CB) /* type = RXY_A STORE HIGH (32) */ \
959 V(chf, CHF, 0xE3CD) /* type = RXY_A COMPARE HIGH (32) */ \
960 V(clhf, CLHF, 0xE3CF) /* type = RXY_A COMPARE LOGICAL HIGH (32) */ \
961 V(ley, LEY, 0xED64) /* type = RXY_A LOAD (short) */ \
962 V(ldy, LDY, 0xED65) /* type = RXY_A LOAD (long) */ \
963 V(stey, STEY, 0xED66) /* type = RXY_A STORE (short) */ \
964 V(stdy, STDY, 0xED67) /* type = RXY_A STORE (long) */
965
966 #define S390_RXY_B_OPCODE_LIST(V) \
967 V(pfd, PFD, 0xE336) /* type = RXY_B PREFETCH DATA */
968
969 #define S390_SIY_OPCODE_LIST(V) \
970 V(tmy, TMY, 0xEB51) /* type = SIY TEST UNDER MASK */ \
971 V(mviy, MVIY, 0xEB52) /* type = SIY MOVE (immediate) */ \
972 V(niy, NIY, 0xEB54) /* type = SIY AND (immediate) */ \
973 V(cliy, CLIY, 0xEB55) /* type = SIY COMPARE LOGICAL (immediate) */ \
974 V(oiy, OIY, 0xEB56) /* type = SIY OR (immediate) */ \
975 V(xiy, XIY, 0xEB57) /* type = SIY EXCLUSIVE OR (immediate) */ \
976 V(asi, ASI, 0xEB6A) /* type = SIY ADD IMMEDIATE (32<-8) */ \
977 V(alsi, ALSI, \
978 0xEB6E) /* type = SIY ADD LOGICAL WITH SIGNED IMMEDIATE (32<-8) */ \
979 V(agsi, AGSI, 0xEB7A) /* type = SIY ADD IMMEDIATE (64<-8) */ \
980 V(algsi, ALGSI, \
981 0xEB7E) /* type = SIY ADD LOGICAL WITH SIGNED IMMEDIATE (64<-8) */
982
983 #define S390_SS_A_OPCODE_LIST(V) \
984 V(trtr, TRTR, 0xD0) /* type = SS_A TRANSLATE AND TEST REVERSE */ \
985 V(mvn, MVN, 0xD1) /* type = SS_A MOVE NUMERICS */ \
986 V(mvc, MVC, 0xD2) /* type = SS_A MOVE (character) */ \
987 V(mvz, MVZ, 0xD3) /* type = SS_A MOVE ZONES */ \
988 V(nc, NC, 0xD4) /* type = SS_A AND (character) */ \
989 V(clc, CLC, 0xD5) /* type = SS_A COMPARE LOGICAL (character) */ \
990 V(oc, OC, 0xD6) /* type = SS_A OR (character) */ \
991 V(xc, XC, 0xD7) /* type = SS_A EXCLUSIVE OR (character) */ \
992 V(tr, TR, 0xDC) /* type = SS_A TRANSLATE */ \
993 V(trt, TRT, 0xDD) /* type = SS_A TRANSLATE AND TEST */ \
994 V(ed, ED, 0xDE) /* type = SS_A EDIT */ \
995 V(edmk, EDMK, 0xDF) /* type = SS_A EDIT AND MARK */ \
996 V(unpku, UNPKU, 0xE2) /* type = SS_A UNPACK UNICODE */ \
997 V(mvcin, MVCIN, 0xE8) /* type = SS_A MOVE INVERSE */ \
998 V(unpka, UNPKA, 0xEA) /* type = SS_A UNPACK ASCII */
999
1000 #define S390_E_OPCODE_LIST(V) \
1001 V(pr, PR, 0x0101) /* type = E PROGRAM RETURN */ \
1002 V(upt, UPT, 0x0102) /* type = E UPDATE TREE */ \
1003 V(ptff, PTFF, 0x0104) /* type = E PERFORM TIMING FACILITY FUNCTION */ \
1004 V(sckpf, SCKPF, 0x0107) /* type = E SET CLOCK PROGRAMMABLE FIELD */ \
1005 V(pfpo, PFPO, 0x010A) /* type = E PERFORM FLOATING-POINT OPERATION */ \
1006 V(tam, TAM, 0x010B) /* type = E TEST ADDRESSING MODE */ \
1007 V(sam24, SAM24, 0x010C) /* type = E SET ADDRESSING MODE (24) */ \
1008 V(sam31, SAM31, 0x010D) /* type = E SET ADDRESSING MODE (31) */ \
1009 V(sam64, SAM64, 0x010E) /* type = E SET ADDRESSING MODE (64) */ \
1010 V(trap2, TRAP2, 0x01FF) /* type = E TRAP */
1011
1012 #define S390_SS_B_OPCODE_LIST(V) \
1013 V(mvo, MVO, 0xF1) /* type = SS_B MOVE WITH OFFSET */ \
1014 V(pack, PACK, 0xF2) /* type = SS_B PACK */ \
1015 V(unpk, UNPK, 0xF3) /* type = SS_B UNPACK */ \
1016 V(zap, ZAP, 0xF8) /* type = SS_B ZERO AND ADD */ \
1017 V(cp, CP, 0xF9) /* type = SS_B COMPARE DECIMAL */ \
1018 V(ap, AP, 0xFA) /* type = SS_B ADD DECIMAL */ \
1019 V(sp, SP, 0xFB) /* type = SS_B SUBTRACT DECIMAL */ \
1020 V(mp, MP, 0xFC) /* type = SS_B MULTIPLY DECIMAL */ \
1021 V(dp, DP, 0xFD) /* type = SS_B DIVIDE DECIMAL */
1022
1023 #define S390_SS_C_OPCODE_LIST(V) \
1024 V(srp, SRP, 0xF0) /* type = SS_C SHIFT AND ROUND DECIMAL */
1025
1026 #define S390_SS_D_OPCODE_LIST(V) \
1027 V(mvck, MVCK, 0xD9) /* type = SS_D MOVE WITH KEY */ \
1028 V(mvcp, MVCP, 0xDA) /* type = SS_D MOVE TO PRIMARY */ \
1029 V(mvcs, MVCS, 0xDB) /* type = SS_D MOVE TO SECONDARY */
1030
1031 #define S390_SS_E_OPCODE_LIST(V) \
1032 V(plo, PLO, 0xEE) /* type = SS_E PERFORM LOCKED OPERATION */ \
1033 V(lmd, LMD, 0xEF) /* type = SS_E LOAD MULTIPLE DISJOINT (64<-32&32) */
1034
1035 #define S390_I_OPCODE_LIST(V) \
1036 V(svc, SVC, 0x0A) /* type = I SUPERVISOR CALL */
1037
1038 #define S390_SS_F_OPCODE_LIST(V) \
1039 V(pku, PKU, 0xE1) /* type = SS_F PACK UNICODE */ \
1040 V(pka, PKA, 0xE9) /* type = SS_F PACK ASCII */
1041
1042 #define S390_SSE_OPCODE_LIST(V) \
1043 V(lasp, LASP, 0xE500) /* type = SSE LOAD ADDRESS SPACE PARAMETERS */ \
1044 V(tprot, TPROT, 0xE501) /* type = SSE TEST PROTECTION */ \
1045 V(strag, STRAG, 0xE502) /* type = SSE STORE REAL ADDRESS */ \
1046 V(mvcsk, MVCSK, 0xE50E) /* type = SSE MOVE WITH SOURCE KEY */ \
1047 V(mvcdk, MVCDK, 0xE50F) /* type = SSE MOVE WITH DESTINATION KEY */
1048
1049 #define S390_SSF_OPCODE_LIST(V) \
1050 V(mvcos, MVCOS, 0xC80) /* type = SSF MOVE WITH OPTIONAL SPECIFICATIONS */ \
1051 V(ectg, ECTG, 0xC81) /* type = SSF EXTRACT CPU TIME */ \
1052 V(csst, CSST, 0xC82) /* type = SSF COMPARE AND SWAP AND STORE */ \
1053 V(lpd, LPD, 0xC84) /* type = SSF LOAD PAIR DISJOINT (32) */ \
1054 V(lpdg, LPDG, 0xC85) /* type = SSF LOAD PAIR DISJOINT (64) */
1055
1056 #define S390_RS_A_OPCODE_LIST(V) \
1057 V(bxh, BXH, 0x86) /* type = RS_A BRANCH ON INDEX HIGH (32) */ \
1058 V(bxle, BXLE, 0x87) /* type = RS_A BRANCH ON INDEX LOW OR EQUAL (32) */ \
1059 V(srl, SRL, 0x88) /* type = RS_A SHIFT RIGHT SINGLE LOGICAL (32) */ \
1060 V(sll, SLL, 0x89) /* type = RS_A SHIFT LEFT SINGLE LOGICAL (32) */ \
1061 V(sra, SRA, 0x8A) /* type = RS_A SHIFT RIGHT SINGLE (32) */ \
1062 V(sla, SLA, 0x8B) /* type = RS_A SHIFT LEFT SINGLE (32) */ \
1063 V(srdl, SRDL, 0x8C) /* type = RS_A SHIFT RIGHT DOUBLE LOGICAL (64) */ \
1064 V(sldl, SLDL, 0x8D) /* type = RS_A SHIFT LEFT DOUBLE LOGICAL (64) */ \
1065 V(srda, SRDA, 0x8E) /* type = RS_A SHIFT RIGHT DOUBLE (64) */ \
1066 V(slda, SLDA, 0x8F) /* type = RS_A SHIFT LEFT DOUBLE (64) */ \
1067 V(stm, STM, 0x90) /* type = RS_A STORE MULTIPLE (32) */ \
1068 V(lm, LM, 0x98) /* type = RS_A LOAD MULTIPLE (32) */ \
1069 V(trace, TRACE, 0x99) /* type = RS_A TRACE (32) */ \
1070 V(lam, LAM, 0x9A) /* type = RS_A LOAD ACCESS MULTIPLE */ \
1071 V(stam, STAM, 0x9B) /* type = RS_A STORE ACCESS MULTIPLE */ \
1072 V(mvcle, MVCLE, 0xA8) /* type = RS_A MOVE LONG EXTENDED */ \
1073 V(clcle, CLCLE, 0xA9) /* type = RS_A COMPARE LOGICAL LONG EXTENDED */ \
1074 V(sigp, SIGP, 0xAE) /* type = RS_A SIGNAL PROCESSOR */ \
1075 V(stctl, STCTL, 0xB6) /* type = RS_A STORE CONTROL (32) */ \
1076 V(lctl, LCTL, 0xB7) /* type = RS_A LOAD CONTROL (32) */ \
1077 V(cs, CS, 0xBA) /* type = RS_A COMPARE AND SWAP (32) */ \
1078 V(cds, CDS, 0xBB) /* type = RS_A COMPARE DOUBLE AND SWAP (32) */
1079
1080 #define S390_RS_B_OPCODE_LIST(V) \
1081 V(clm, CLM, 0xBD) /* type = RS_B COMPARE LOGICAL CHAR. UNDER MASK (low) */ \
1082 V(stcm, STCM, 0xBE) /* type = RS_B STORE CHARACTERS UNDER MASK (low) */ \
1083 V(icm, ICM, 0xBF) /* type = RS_B INSERT CHARACTERS UNDER MASK (low) */
1084
1085 #define S390_S_OPCODE_LIST(V) \
1086 V(awr, AWR, 0x2E) /* type = S ADD UNNORMALIZED (long HFP) */ \
1087 V(lpsw, LPSW, 0x82) /* type = S LOAD PSW */ \
1088 V(diagnose, DIAGNOSE, 0x83) /* type = S DIAGNOSE */ \
1089 V(ts, TS, 0x93) /* type = S TEST AND SET */ \
1090 V(stidp, STIDP, 0xB202) /* type = S STORE CPU ID */ \
1091 V(sck, SCK, 0xB204) /* type = S SET CLOCK */ \
1092 V(stck, STCK, 0xB205) /* type = S STORE CLOCK */ \
1093 V(sckc, SCKC, 0xB206) /* type = S SET CLOCK COMPARATOR */ \
1094 V(stckc, STCKC, 0xB207) /* type = S STORE CLOCK COMPARATOR */ \
1095 V(spt, SPT, 0xB208) /* type = S SET CPU TIMER */ \
1096 V(stpt, STPT, 0xB209) /* type = S STORE CPU TIMER */ \
1097 V(spka, SPKA, 0xB20A) /* type = S SET PSW KEY FROM ADDRESS */ \
1098 V(ipk, IPK, 0xB20B) /* type = S INSERT PSW KEY */ \
1099 V(ptlb, PTLB, 0xB20D) /* type = S PURGE TLB */ \
1100 V(spx, SPX, 0xB210) /* type = S SET PREFIX */ \
1101 V(stpx, STPX, 0xB211) /* type = S STORE PREFIX */ \
1102 V(stap, STAP, 0xB212) /* type = S STORE CPU ADDRESS */ \
1103 V(pc, PC, 0xB218) /* type = S PROGRAM CALL */ \
1104 V(sac, SAC, 0xB219) /* type = S SET ADDRESS SPACE CONTROL */ \
1105 V(cfc, CFC, 0xB21A) /* type = S COMPARE AND FORM CODEWORD */ \
1106 V(csch, CSCH, 0xB230) /* type = S CLEAR SUBCHANNEL */ \
1107 V(hsch, HSCH, 0xB231) /* type = S HALT SUBCHANNEL */ \
1108 V(msch, MSCH, 0xB232) /* type = S MODIFY SUBCHANNEL */ \
1109 V(ssch, SSCH, 0xB233) /* type = S START SUBCHANNEL */ \
1110 V(stsch, STSCH, 0xB234) /* type = S STORE SUBCHANNEL */ \
1111 V(tsch, TSCH, 0xB235) /* type = S TEST SUBCHANNEL */ \
1112 V(tpi, TPI, 0xB236) /* type = S TEST PENDING INTERRUPTION */ \
1113 V(sal, SAL, 0xB237) /* type = S SET ADDRESS LIMIT */ \
1114 V(rsch, RSCH, 0xB238) /* type = S RESUME SUBCHANNEL */ \
1115 V(stcrw, STCRW, 0xB239) /* type = S STORE CHANNEL REPORT WORD */ \
1116 V(stcps, STCPS, 0xB23A) /* type = S STORE CHANNEL PATH STATUS */ \
1117 V(rchp, RCHP, 0xB23B) /* type = S RESET CHANNEL PATH */ \
1118 V(schm, SCHM, 0xB23C) /* type = S SET CHANNEL MONITOR */ \
1119 V(xsch, XSCH, 0xB276) /* type = S CANCEL SUBCHANNEL */ \
1120 V(rp, RP_Z, 0xB277) /* type = S RESUME PROGRAM */ \
1121 V(stcke, STCKE, 0xB278) /* type = S STORE CLOCK EXTENDED */ \
1122 V(sacf, SACF, 0xB279) /* type = S SET ADDRESS SPACE CONTROL FAST */ \
1123 V(stckf, STCKF, 0xB27C) /* type = S STORE CLOCK FAST */ \
1124 V(stsi, STSI, 0xB27D) /* type = S STORE SYSTEM INFORMATION */ \
1125 V(srnm, SRNM, 0xB299) /* type = S SET BFP ROUNDING MODE (2 bit) */ \
1126 V(stfpc, STFPC, 0xB29C) /* type = S STORE FPC */ \
1127 V(lfpc, LFPC, 0xB29D) /* type = S LOAD FPC */ \
1128 V(stfle, STFLE, 0xB2B0) /* type = S STORE FACILITY LIST EXTENDED */ \
1129 V(stfl, STFL, 0xB2B1) /* type = S STORE FACILITY LIST */ \
1130 V(lpswe, LPSWE, 0xB2B2) /* type = S LOAD PSW EXTENDED */ \
1131 V(srnmb, SRNMB, 0xB2B8) /* type = S SET BFP ROUNDING MODE (3 bit) */ \
1132 V(srnmt, SRNMT, 0xB2B9) /* type = S SET DFP ROUNDING MODE */ \
1133 V(lfas, LFAS, 0xB2BD) /* type = S LOAD FPC AND SIGNAL */ \
1134 V(tend, TEND, 0xB2F8) /* type = S TRANSACTION END */ \
1135 V(tabort, TABORT, 0xB2FC) /* type = S TRANSACTION ABORT */ \
1136 V(trap4, TRAP4, 0xB2FF) /* type = S TRAP */
1137
1138 #define S390_RX_A_OPCODE_LIST(V) \
1139 V(la, LA, 0x41) /* type = RX_A LOAD ADDRESS */ \
1140 V(stc, STC, 0x42) /* type = RX_A STORE CHARACTER */ \
1141 V(ic_z, IC_z, 0x43) /* type = RX_A INSERT CHARACTER */ \
1142 V(ex, EX, 0x44) /* type = RX_A EXECUTE */ \
1143 V(bal, BAL, 0x45) /* type = RX_A BRANCH AND LINK */ \
1144 V(bct, BCT, 0x46) /* type = RX_A BRANCH ON COUNT (32) */ \
1145 V(bc, BC, 0x47) /* type = RX_A BRANCH ON CONDITION */ \
1146 V(ch, CH, 0x49) /* type = RX_A COMPARE HALFWORD (32<-16) */ \
1147 V(ah, AH, 0x4A) /* type = RX_A ADD HALFWORD (32<-16) */ \
1148 V(sh, SH, 0x4B) /* type = RX_A SUBTRACT HALFWORD (32<-16) */ \
1149 V(mh, MH, 0x4C) /* type = RX_A MULTIPLY HALFWORD (32<-16) */ \
1150 V(bas, BAS, 0x4D) /* type = RX_A BRANCH AND SAVE */ \
1151 V(cvd, CVD, 0x4E) /* type = RX_A CONVERT TO DECIMAL (32) */ \
1152 V(cvb, CVB, 0x4F) /* type = RX_A CONVERT TO BINARY (32) */ \
1153 V(st, ST, 0x50) /* type = RX_A STORE (32) */ \
1154 V(lae, LAE, 0x51) /* type = RX_A LOAD ADDRESS EXTENDED */ \
1155 V(n, N, 0x54) /* type = RX_A AND (32) */ \
1156 V(cl, CL, 0x55) /* type = RX_A COMPARE LOGICAL (32) */ \
1157 V(o, O, 0x56) /* type = RX_A OR (32) */ \
1158 V(x, X, 0x57) /* type = RX_A EXCLUSIVE OR (32) */ \
1159 V(l, L, 0x58) /* type = RX_A LOAD (32) */ \
1160 V(c, C, 0x59) /* type = RX_A COMPARE (32) */ \
1161 V(a, A, 0x5A) /* type = RX_A ADD (32) */ \
1162 V(s, S, 0x5B) /* type = RX_A SUBTRACT (32) */ \
1163 V(m, M, 0x5C) /* type = RX_A MULTIPLY (64<-32) */ \
1164 V(d, D, 0x5D) /* type = RX_A DIVIDE (32<-64) */ \
1165 V(al, AL, 0x5E) /* type = RX_A ADD LOGICAL (32) */ \
1166 V(sl, SL, 0x5F) /* type = RX_A SUBTRACT LOGICAL (32) */ \
1167 V(std, STD, 0x60) /* type = RX_A STORE (long) */ \
1168 V(mxd, MXD, 0x67) /* type = RX_A MULTIPLY (long to extended HFP) */ \
1169 V(ld, LD, 0x68) /* type = RX_A LOAD (long) */ \
1170 V(cd, CD, 0x69) /* type = RX_A COMPARE (long HFP) */ \
1171 V(ad, AD, 0x6A) /* type = RX_A ADD NORMALIZED (long HFP) */ \
1172 V(sd, SD, 0x6B) /* type = RX_A SUBTRACT NORMALIZED (long HFP) */ \
1173 V(md, MD, 0x6C) /* type = RX_A MULTIPLY (long HFP) */ \
1174 V(dd, DD, 0x6D) /* type = RX_A DIVIDE (long HFP) */ \
1175 V(aw, AW, 0x6E) /* type = RX_A ADD UNNORMALIZED (long HFP) */ \
1176 V(sw, SW, 0x6F) /* type = RX_A SUBTRACT UNNORMALIZED (long HFP) */ \
1177 V(ste, STE, 0x70) /* type = RX_A STORE (short) */ \
1178 V(ms, MS, 0x71) /* type = RX_A MULTIPLY SINGLE (32) */ \
1179 V(le, LE, 0x78) /* type = RX_A LOAD (short) */ \
1180 V(ce, CE, 0x79) /* type = RX_A COMPARE (short HFP) */ \
1181 V(ae, AE, 0x7A) /* type = RX_A ADD NORMALIZED (short HFP) */ \
1182 V(se, SE, 0x7B) /* type = RX_A SUBTRACT NORMALIZED (short HFP) */ \
1183 V(mde, MDE, 0x7C) /* type = RX_A MULTIPLY (short to long HFP) */ \
1184 V(me, ME, 0x7C) /* type = RX_A MULTIPLY (short to long HFP) */ \
1185 V(de, DE, 0x7D) /* type = RX_A DIVIDE (short HFP) */ \
1186 V(au, AU, 0x7E) /* type = RX_A ADD UNNORMALIZED (short HFP) */ \
1187 V(su, SU, 0x7F) /* type = RX_A SUBTRACT UNNORMALIZED (short HFP) */ \
1188 V(ssm, SSM, 0x80) /* type = RX_A SET SYSTEM MASK */ \
1189 V(lra, LRA, 0xB1) /* type = RX_A LOAD REAL ADDRESS (32) */
1190
1191 #define S390_RX_B_OPCODE_LIST(V) \
1192 V(lh, LH, 0x48) /* type = RX_B LOAD HALFWORD (32<-16) */
1193
1194 #define S390_RIE_A_OPCODE_LIST(V) \
1195 V(cgit, CGIT, 0xEC70) /* type = RIE_A COMPARE IMMEDIATE AND TRAP (64<-16) */ \
1196 V(clgit, CLGIT, \
1197 0xEC71) /* type = RIE_A COMPARE LOGICAL IMMEDIATE AND TRAP (64<-16) */ \
1198 V(cit, CIT, 0xEC72) /* type = RIE_A COMPARE IMMEDIATE AND TRAP (32<-16) */ \
1199 V(clfit, CLFIT, \
1200 0xEC73) /* type = RIE_A COMPARE LOGICAL IMMEDIATE AND TRAP (32<-16) */
1201
1202 #define S390_RRD_OPCODE_LIST(V) \
1203 V(maebr, MAEBR, 0xB30E) /* type = RRD MULTIPLY AND ADD (short BFP) */ \
1204 V(msebr, MSEBR, 0xB30F) /* type = RRD MULTIPLY AND SUBTRACT (short BFP) */ \
1205 V(madbr, MADBR, 0xB31E) /* type = RRD MULTIPLY AND ADD (long BFP) */ \
1206 V(msdbr, MSDBR, 0xB31F) /* type = RRD MULTIPLY AND SUBTRACT (long BFP) */ \
1207 V(maer, MAER, 0xB32E) /* type = RRD MULTIPLY AND ADD (short HFP) */ \
1208 V(mser, MSER, 0xB32F) /* type = RRD MULTIPLY AND SUBTRACT (short HFP) */ \
1209 V(maylr, MAYLR, \
1210 0xB338) /* type = RRD MULTIPLY AND ADD UNNRM. (long to ext. low HFP) */ \
1211 V(mylr, MYLR, \
1212 0xB339) /* type = RRD MULTIPLY UNNORM. (long to ext. low HFP) */ \
1213 V(mayr, MAYR, \
1214 0xB33A) /* type = RRD MULTIPLY & ADD UNNORMALIZED (long to ext. HFP) */ \
1215 V(myr, MYR, \
1216 0xB33B) /* type = RRD MULTIPLY UNNORMALIZED (long to ext. HFP) */ \
1217 V(mayhr, MAYHR, \
1218 0xB33C) /* type = RRD MULTIPLY AND ADD UNNRM. (long to ext. high HFP) */ \
1219 V(myhr, MYHR, \
1220 0xB33D) /* type = RRD MULTIPLY UNNORM. (long to ext. high HFP) */ \
1221 V(madr, MADR, 0xB33E) /* type = RRD MULTIPLY AND ADD (long HFP) */ \
1222 V(msdr, MSDR, 0xB33F) /* type = RRD MULTIPLY AND SUBTRACT (long HFP) */
1223
1224 #define S390_RIE_B_OPCODE_LIST(V) \
1225 V(cgrj, CGRJ, 0xEC64) /* type = RIE_B COMPARE AND BRANCH RELATIVE (64) */ \
1226 V(clgrj, CLGRJ, \
1227 0xEC65) /* type = RIE_B COMPARE LOGICAL AND BRANCH RELATIVE (64) */ \
1228 V(crj, CRJ, 0xEC76) /* type = RIE_B COMPARE AND BRANCH RELATIVE (32) */ \
1229 V(clrj, CLRJ, \
1230 0xEC77) /* type = RIE_B COMPARE LOGICAL AND BRANCH RELATIVE (32) */
1231
1232 #define S390_RRE_OPCODE_LIST(V) \
1233 V(ipm, IPM, 0xB222) /* type = RRE INSERT PROGRAM MASK */ \
1234 V(ivsk, IVSK, 0xB223) /* type = RRE INSERT VIRTUAL STORAGE KEY */ \
1235 V(iac, IAC, 0xB224) /* type = RRE INSERT ADDRESS SPACE CONTROL */ \
1236 V(ssar, SSAR, 0xB225) /* type = RRE SET SECONDARY ASN */ \
1237 V(epar, EPAR, 0xB226) /* type = RRE EXTRACT PRIMARY ASN */ \
1238 V(esar, ESAR, 0xB227) /* type = RRE EXTRACT SECONDARY ASN */ \
1239 V(pt, PT, 0xB228) /* type = RRE PROGRAM TRANSFER */ \
1240 V(iske, ISKE, 0xB229) /* type = RRE INSERT STORAGE KEY EXTENDED */ \
1241 V(rrbe, RRBE, 0xB22A) /* type = RRE RESET REFERENCE BIT EXTENDED */ \
1242 V(tb, TB, 0xB22C) /* type = RRE TEST BLOCK */ \
1243 V(dxr, DXR, 0xB22D) /* type = RRE DIVIDE (extended HFP) */ \
1244 V(pgin, PGIN, 0xB22E) /* type = RRE PAGE IN */ \
1245 V(pgout, PGOUT, 0xB22F) /* type = RRE PAGE OUT */ \
1246 V(bakr, BAKR, 0xB240) /* type = RRE BRANCH AND STACK */ \
1247 V(cksm, CKSM, 0xB241) /* type = RRE CHECKSUM */ \
1248 V(sqdr, SQDR, 0xB244) /* type = RRE SQUARE ROOT (long HFP) */ \
1249 V(sqer, SQER, 0xB245) /* type = RRE SQUARE ROOT (short HFP) */ \
1250 V(stura, STURA, 0xB246) /* type = RRE STORE USING REAL ADDRESS (32) */ \
1251 V(msta, MSTA, 0xB247) /* type = RRE MODIFY STACKED STATE */ \
1252 V(palb, PALB, 0xB248) /* type = RRE PURGE ALB */ \
1253 V(ereg, EREG, 0xB249) /* type = RRE EXTRACT STACKED REGISTERS (32) */ \
1254 V(esta, ESTA, 0xB24A) /* type = RRE EXTRACT STACKED STATE */ \
1255 V(lura, LURA, 0xB24B) /* type = RRE LOAD USING REAL ADDRESS (32) */ \
1256 V(tar, TAR, 0xB24C) /* type = RRE TEST ACCESS */ \
1257 V(cpya, CPYA, 0xB24D) /* type = RRE COPY ACCESS */ \
1258 V(sar, SAR, 0xB24E) /* type = RRE SET ACCESS */ \
1259 V(ear, EAR, 0xB24F) /* type = RRE EXTRACT ACCESS */ \
1260 V(csp, CSP, 0xB250) /* type = RRE COMPARE AND SWAP AND PURGE (32) */ \
1261 V(msr, MSR, 0xB252) /* type = RRE MULTIPLY SINGLE (32) */ \
1262 V(mvpg, MVPG, 0xB254) /* type = RRE MOVE PAGE */ \
1263 V(mvst, MVST, 0xB255) /* type = RRE MOVE STRING */ \
1264 V(cuse, CUSE, 0xB257) /* type = RRE COMPARE UNTIL SUBSTRING EQUAL */ \
1265 V(bsg, BSG, 0xB258) /* type = RRE BRANCH IN SUBSPACE GROUP */ \
1266 V(bsa, BSA, 0xB25A) /* type = RRE BRANCH AND SET AUTHORITY */ \
1267 V(clst, CLST, 0xB25D) /* type = RRE COMPARE LOGICAL STRING */ \
1268 V(srst, SRST, 0xB25E) /* type = RRE SEARCH STRING */ \
1269 V(cmpsc, CMPSC, 0xB263) /* type = RRE COMPRESSION CALL */ \
1270 V(tre, TRE, 0xB2A5) /* type = RRE TRANSLATE EXTENDED */ \
1271 V(etnd, ETND, 0xB2EC) /* type = RRE EXTRACT TRANSACTION NESTING DEPTH */ \
1272 V(lpebr, LPEBR, 0xB300) /* type = RRE LOAD POSITIVE (short BFP) */ \
1273 V(lnebr, LNEBR, 0xB301) /* type = RRE LOAD NEGATIVE (short BFP) */ \
1274 V(ltebr, LTEBR, 0xB302) /* type = RRE LOAD AND TEST (short BFP) */ \
1275 V(lcebr, LCEBR, 0xB303) /* type = RRE LOAD COMPLEMENT (short BFP) */ \
1276 V(ldebr, LDEBR, \
1277 0xB304) /* type = RRE LOAD LENGTHENED (short to long BFP) */ \
1278 V(lxdbr, LXDBR, \
1279 0xB305) /* type = RRE LOAD LENGTHENED (long to extended BFP) */ \
1280 V(lxebr, LXEBR, \
1281 0xB306) /* type = RRE LOAD LENGTHENED (short to extended BFP) */ \
1282 V(mxdbr, MXDBR, 0xB307) /* type = RRE MULTIPLY (long to extended BFP) */ \
1283 V(kebr, KEBR, 0xB308) /* type = RRE COMPARE AND SIGNAL (short BFP) */ \
1284 V(cebr, CEBR, 0xB309) /* type = RRE COMPARE (short BFP) */ \
1285 V(aebr, AEBR, 0xB30A) /* type = RRE ADD (short BFP) */ \
1286 V(sebr, SEBR, 0xB30B) /* type = RRE SUBTRACT (short BFP) */ \
1287 V(mdebr, MDEBR, 0xB30C) /* type = RRE MULTIPLY (short to long BFP) */ \
1288 V(debr, DEBR, 0xB30D) /* type = RRE DIVIDE (short BFP) */ \
1289 V(lpdbr, LPDBR, 0xB310) /* type = RRE LOAD POSITIVE (long BFP) */ \
1290 V(lndbr, LNDBR, 0xB311) /* type = RRE LOAD NEGATIVE (long BFP) */ \
1291 V(ltdbr, LTDBR, 0xB312) /* type = RRE LOAD AND TEST (long BFP) */ \
1292 V(lcdbr, LCDBR, 0xB313) /* type = RRE LOAD COMPLEMENT (long BFP) */ \
1293 V(sqebr, SQEBR, 0xB314) /* type = RRE SQUARE ROOT (short BFP) */ \
1294 V(sqdbr, SQDBR, 0xB315) /* type = RRE SQUARE ROOT (long BFP) */ \
1295 V(sqxbr, SQXBR, 0xB316) /* type = RRE SQUARE ROOT (extended BFP) */ \
1296 V(meebr, MEEBR, 0xB317) /* type = RRE MULTIPLY (short BFP) */ \
1297 V(kdbr, KDBR, 0xB318) /* type = RRE COMPARE AND SIGNAL (long BFP) */ \
1298 V(cdbr, CDBR, 0xB319) /* type = RRE COMPARE (long BFP) */ \
1299 V(adbr, ADBR, 0xB31A) /* type = RRE ADD (long BFP) */ \
1300 V(sdbr, SDBR, 0xB31B) /* type = RRE SUBTRACT (long BFP) */ \
1301 V(mdbr, MDBR, 0xB31C) /* type = RRE MULTIPLY (long BFP) */ \
1302 V(ddbr, DDBR, 0xB31D) /* type = RRE DIVIDE (long BFP) */ \
1303 V(lder, LDER, 0xB324) /* type = RRE LOAD LENGTHENED (short to long HFP) */ \
1304 V(lxdr, LXDR, \
1305 0xB325) /* type = RRE LOAD LENGTHENED (long to extended HFP) */ \
1306 V(lxer, LXER, \
1307 0xB326) /* type = RRE LOAD LENGTHENED (short to extended HFP) */ \
1308 V(sqxr, SQXR, 0xB336) /* type = RRE SQUARE ROOT (extended HFP) */ \
1309 V(meer, MEER, 0xB337) /* type = RRE MULTIPLY (short HFP) */ \
1310 V(lpxbr, LPXBR, 0xB340) /* type = RRE LOAD POSITIVE (extended BFP) */ \
1311 V(lnxbr, LNXBR, 0xB341) /* type = RRE LOAD NEGATIVE (extended BFP) */ \
1312 V(ltxbr, LTXBR, 0xB342) /* type = RRE LOAD AND TEST (extended BFP) */ \
1313 V(lcxbr, LCXBR, 0xB343) /* type = RRE LOAD COMPLEMENT (extended BFP) */ \
1314 V(ledbr, LEDBR, 0xB344) /* type = RRE LOAD ROUNDED (long to short BFP) */ \
1315 V(ldxbr, LDXBR, \
1316 0xB345) /* type = RRE LOAD ROUNDED (extended to long BFP) */ \
1317 V(lexbr, LEXBR, \
1318 0xB346) /* type = RRE LOAD ROUNDED (extended to short BFP) */ \
1319 V(kxbr, KXBR, 0xB348) /* type = RRE COMPARE AND SIGNAL (extended BFP) */ \
1320 V(cxbr, CXBR, 0xB349) /* type = RRE COMPARE (extended BFP) */ \
1321 V(axbr, AXBR, 0xB34A) /* type = RRE ADD (extended BFP) */ \
1322 V(sxbr, SXBR, 0xB34B) /* type = RRE SUBTRACT (extended BFP) */ \
1323 V(mxbr, MXBR, 0xB34C) /* type = RRE MULTIPLY (extended BFP) */ \
1324 V(dxbr, DXBR, 0xB34D) /* type = RRE DIVIDE (extended BFP) */ \
1325 V(thder, THDER, \
1326 0xB358) /* type = RRE CONVERT BFP TO HFP (short to long) */ \
1327 V(thdr, THDR, 0xB359) /* type = RRE CONVERT BFP TO HFP (long) */ \
1328 V(lpxr, LPXR, 0xB360) /* type = RRE LOAD POSITIVE (extended HFP) */ \
1329 V(lnxr, LNXR, 0xB361) /* type = RRE LOAD NEGATIVE (extended HFP) */ \
1330 V(ltxr, LTXR, 0xB362) /* type = RRE LOAD AND TEST (extended HFP) */ \
1331 V(lcxr, LCXR, 0xB363) /* type = RRE LOAD COMPLEMENT (extended HFP) */ \
1332 V(lxr, LXR, 0xB365) /* type = RRE LOAD (extended) */ \
1333 V(lexr, LEXR, \
1334 0xB366) /* type = RRE LOAD ROUNDED (extended to short HFP) */ \
1335 V(fixr, FIXR, 0xB367) /* type = RRE LOAD FP INTEGER (extended HFP) */ \
1336 V(cxr, CXR, 0xB369) /* type = RRE COMPARE (extended HFP) */ \
1337 V(lpdfr, LPDFR, 0xB370) /* type = RRE LOAD POSITIVE (long) */ \
1338 V(lndfr, LNDFR, 0xB371) /* type = RRE LOAD NEGATIVE (long) */ \
1339 V(lcdfr, LCDFR, 0xB373) /* type = RRE LOAD COMPLEMENT (long) */ \
1340 V(lzer, LZER, 0xB374) /* type = RRE LOAD ZERO (short) */ \
1341 V(lzdr, LZDR, 0xB375) /* type = RRE LOAD ZERO (long) */ \
1342 V(lzxr, LZXR, 0xB376) /* type = RRE LOAD ZERO (extended) */ \
1343 V(fier, FIER, 0xB377) /* type = RRE LOAD FP INTEGER (short HFP) */ \
1344 V(fidr, FIDR, 0xB37F) /* type = RRE LOAD FP INTEGER (long HFP) */ \
1345 V(sfpc, SFPC, 0xB384) /* type = RRE SET FPC */ \
1346 V(sfasr, SFASR, 0xB385) /* type = RRE SET FPC AND SIGNAL */ \
1347 V(efpc, EFPC, 0xB38C) /* type = RRE EXTRACT FPC */ \
1348 V(cefbr, CEFBR, \
1349 0xB394) /* type = RRE CONVERT FROM FIXED (32 to short BFP) */ \
1350 V(cdfbr, CDFBR, \
1351 0xB395) /* type = RRE CONVERT FROM FIXED (32 to long BFP) */ \
1352 V(cxfbr, CXFBR, \
1353 0xB396) /* type = RRE CONVERT FROM FIXED (32 to extended BFP) */ \
1354 V(cegbr, CEGBR, \
1355 0xB3A4) /* type = RRE CONVERT FROM FIXED (64 to short BFP) */ \
1356 V(cdgbr, CDGBR, \
1357 0xB3A5) /* type = RRE CONVERT FROM FIXED (64 to long BFP) */ \
1358 V(cxgbr, CXGBR, \
1359 0xB3A6) /* type = RRE CONVERT FROM FIXED (64 to extended BFP) */ \
1360 V(cefr, CEFR, \
1361 0xB3B4) /* type = RRE CONVERT FROM FIXED (32 to short HFP) */ \
1362 V(cdfr, CDFR, 0xB3B5) /* type = RRE CONVERT FROM FIXED (32 to long HFP) */ \
1363 V(cxfr, CXFR, \
1364 0xB3B6) /* type = RRE CONVERT FROM FIXED (32 to extended HFP) */ \
1365 V(ldgr, LDGR, 0xB3C1) /* type = RRE LOAD FPR FROM GR (64 to long) */ \
1366 V(cegr, CEGR, \
1367 0xB3C4) /* type = RRE CONVERT FROM FIXED (64 to short HFP) */ \
1368 V(cdgr, CDGR, 0xB3C5) /* type = RRE CONVERT FROM FIXED (64 to long HFP) */ \
1369 V(cxgr, CXGR, \
1370 0xB3C6) /* type = RRE CONVERT FROM FIXED (64 to extended HFP) */ \
1371 V(lgdr, LGDR, 0xB3CD) /* type = RRE LOAD GR FROM FPR (long to 64) */ \
1372 V(ltdtr, LTDTR, 0xB3D6) /* type = RRE LOAD AND TEST (long DFP) */ \
1373 V(ltxtr, LTXTR, 0xB3DE) /* type = RRE LOAD AND TEST (extended DFP) */ \
1374 V(kdtr, KDTR, 0xB3E0) /* type = RRE COMPARE AND SIGNAL (long DFP) */ \
1375 V(cudtr, CUDTR, 0xB3E2) /* type = RRE CONVERT TO UNSIGNED PACKED (long */ \
1376 /* DFP to 64) CUDTR */ \
1377 V(cdtr, CDTR, 0xB3E4) /* type = RRE COMPARE (long DFP) */ \
1378 V(eedtr, EEDTR, \
1379 0xB3E5) /* type = RRE EXTRACT BIASED EXPONENT (long DFP to 64) */ \
1380 V(esdtr, ESDTR, \
1381 0xB3E7) /* type = RRE EXTRACT SIGNIFICANCE (long DFP to 64) */ \
1382 V(kxtr, KXTR, 0xB3E8) /* type = RRE COMPARE AND SIGNAL (extended DFP) */ \
1383 V(cuxtr, CUXTR, \
1384 0xB3EA) /* type = RRE CONVERT TO UNSIGNED PACKED (extended DFP */ \
1385 /* CUXTR to 128) */ \
1386 V(cxtr, CXTR, 0xB3EC) /* type = RRE COMPARE (extended DFP) */ \
1387 V(eextr, EEXTR, \
1388 0xB3ED) /* type = RRE EXTRACT BIASED EXPONENT (extended DFP to 64) */ \
1389 V(esxtr, ESXTR, \
1390 0xB3EF) /* type = RRE EXTRACT SIGNIFICANCE (extended DFP to 64) */ \
1391 V(cdgtr, CDGTR, \
1392 0xB3F1) /* type = RRE CONVERT FROM FIXED (64 to long DFP) */ \
1393 V(cdutr, CDUTR, \
1394 0xB3F2) /* type = RRE CONVERT FROM UNSIGNED PACKED (64 to long DFP) */ \
1395 V(cdstr, CDSTR, \
1396 0xB3F3) /* type = RRE CONVERT FROM SIGNED PACKED (64 to long DFP) */ \
1397 V(cedtr, CEDTR, \
1398 0xB3F4) /* type = RRE COMPARE BIASED EXPONENT (long DFP) */ \
1399 V(cxgtr, CXGTR, \
1400 0xB3F9) /* type = RRE CONVERT FROM FIXED (64 to extended DFP) */ \
1401 V(cxutr, CXUTR, \
1402 0xB3FA) /* type = RRE CONVERT FROM UNSIGNED PACKED (128 to ext. DFP) */ \
1403 V(cxstr, CXSTR, 0xB3FB) /* type = RRE CONVERT FROM SIGNED PACKED (128 to*/ \
1404 /* extended DFP) */ \
1405 V(cextr, CEXTR, \
1406 0xB3FC) /* type = RRE COMPARE BIASED EXPONENT (extended DFP) */ \
1407 V(lpgr, LPGR, 0xB900) /* type = RRE LOAD POSITIVE (64) */ \
1408 V(lngr, LNGR, 0xB901) /* type = RRE LOAD NEGATIVE (64) */ \
1409 V(ltgr, LTGR, 0xB902) /* type = RRE LOAD AND TEST (64) */ \
1410 V(lcgr, LCGR, 0xB903) /* type = RRE LOAD COMPLEMENT (64) */ \
1411 V(lgr, LGR, 0xB904) /* type = RRE LOAD (64) */ \
1412 V(lurag, LURAG, 0xB905) /* type = RRE LOAD USING REAL ADDRESS (64) */ \
1413 V(lgbr, LGBR, 0xB906) /* type = RRE LOAD BYTE (64<-8) */ \
1414 V(lghr, LGHR, 0xB907) /* type = RRE LOAD HALFWORD (64<-16) */ \
1415 V(agr, AGR, 0xB908) /* type = RRE ADD (64) */ \
1416 V(sgr, SGR, 0xB909) /* type = RRE SUBTRACT (64) */ \
1417 V(algr, ALGR, 0xB90A) /* type = RRE ADD LOGICAL (64) */ \
1418 V(slgr, SLGR, 0xB90B) /* type = RRE SUBTRACT LOGICAL (64) */ \
1419 V(msgr, MSGR, 0xB90C) /* type = RRE MULTIPLY SINGLE (64) */ \
1420 V(dsgr, DSGR, 0xB90D) /* type = RRE DIVIDE SINGLE (64) */ \
1421 V(eregg, EREGG, 0xB90E) /* type = RRE EXTRACT STACKED REGISTERS (64) */ \
1422 V(lrvgr, LRVGR, 0xB90F) /* type = RRE LOAD REVERSED (64) */ \
1423 V(lpgfr, LPGFR, 0xB910) /* type = RRE LOAD POSITIVE (64<-32) */ \
1424 V(lngfr, LNGFR, 0xB911) /* type = RRE LOAD NEGATIVE (64<-32) */ \
1425 V(ltgfr, LTGFR, 0xB912) /* type = RRE LOAD AND TEST (64<-32) */ \
1426 V(lcgfr, LCGFR, 0xB913) /* type = RRE LOAD COMPLEMENT (64<-32) */ \
1427 V(lgfr, LGFR, 0xB914) /* type = RRE LOAD (64<-32) */ \
1428 V(llgfr, LLGFR, 0xB916) /* type = RRE LOAD LOGICAL (64<-32) */ \
1429 V(llgtr, LLGTR, \
1430 0xB917) /* type = RRE LOAD LOGICAL THIRTY ONE BITS (64<-31) */ \
1431 V(agfr, AGFR, 0xB918) /* type = RRE ADD (64<-32) */ \
1432 V(sgfr, SGFR, 0xB919) /* type = RRE SUBTRACT (64<-32) */ \
1433 V(algfr, ALGFR, 0xB91A) /* type = RRE ADD LOGICAL (64<-32) */ \
1434 V(slgfr, SLGFR, 0xB91B) /* type = RRE SUBTRACT LOGICAL (64<-32) */ \
1435 V(msgfr, MSGFR, 0xB91C) /* type = RRE MULTIPLY SINGLE (64<-32) */ \
1436 V(dsgfr, DSGFR, 0xB91D) /* type = RRE DIVIDE SINGLE (64<-32) */ \
1437 V(kmac, KMAC, 0xB91E) /* type = RRE COMPUTE MESSAGE AUTHENTICATION CODE */ \
1438 V(lrvr, LRVR, 0xB91F) /* type = RRE LOAD REVERSED (32) */ \
1439 V(cgr, CGR, 0xB920) /* type = RRE COMPARE (64) */ \
1440 V(clgr, CLGR, 0xB921) /* type = RRE COMPARE LOGICAL (64) */ \
1441 V(sturg, STURG, 0xB925) /* type = RRE STORE USING REAL ADDRESS (64) */ \
1442 V(lbr, LBR, 0xB926) /* type = RRE LOAD BYTE (32<-8) */ \
1443 V(lhr, LHR, 0xB927) /* type = RRE LOAD HALFWORD (32<-16) */ \
1444 V(pckmo, PCKMO, \
1445 0xB928) /* type = RRE PERFORM CRYPTOGRAPHIC KEY MGMT. OPERATIONS */ \
1446 V(kmf, KMF, 0xB92A) /* type = RRE CIPHER MESSAGE WITH CIPHER FEEDBACK */ \
1447 V(kmo, KMO, 0xB92B) /* type = RRE CIPHER MESSAGE WITH OUTPUT FEEDBACK */ \
1448 V(pcc, PCC, 0xB92C) /* type = RRE PERFORM CRYPTOGRAPHIC COMPUTATION */ \
1449 V(km, KM, 0xB92E) /* type = RRE CIPHER MESSAGE */ \
1450 V(kmc, KMC, 0xB92F) /* type = RRE CIPHER MESSAGE WITH CHAINING */ \
1451 V(cgfr, CGFR, 0xB930) /* type = RRE COMPARE (64<-32) */ \
1452 V(clgfr, CLGFR, 0xB931) /* type = RRE COMPARE LOGICAL (64<-32) */ \
1453 V(ppno, PPNO, \
1454 0xB93C) /* type = RRE PERFORM PSEUDORANDOM NUMBER OPERATION */ \
1455 V(kimd, KIMD, 0xB93E) /* type = RRE COMPUTE INTERMEDIATE MESSAGE DIGEST */ \
1456 V(klmd, KLMD, 0xB93F) /* type = RRE COMPUTE LAST MESSAGE DIGEST */ \
1457 V(bctgr, BCTGR, 0xB946) /* type = RRE BRANCH ON COUNT (64) */ \
1458 V(cdftr, CDFTR, \
1459 0xB951) /* type = RRE CONVERT FROM FIXED (32 to long DFP) */ \
1460 V(cxftr, CXFTR, \
1461 0xB959) /* type = RRE CONVERT FROM FIXED (32 to extended DFP) */ \
1462 V(ngr, NGR, 0xB980) /* type = RRE AND (64) */ \
1463 V(ogr, OGR, 0xB981) /* type = RRE OR (64) */ \
1464 V(xgr, XGR, 0xB982) /* type = RRE EXCLUSIVE OR (64) */ \
1465 V(flogr, FLOGR, 0xB983) /* type = RRE FIND LEFTMOST ONE */ \
1466 V(llgcr, LLGCR, 0xB984) /* type = RRE LOAD LOGICAL CHARACTER (64<-8) */ \
1467 V(llghr, LLGHR, 0xB985) /* type = RRE LOAD LOGICAL HALFWORD (64<-16) */ \
1468 V(mlgr, MLGR, 0xB986) /* type = RRE MULTIPLY LOGICAL (128<-64) */ \
1469 V(dlgr, DLGR, 0xB987) /* type = RRE DIVIDE LOGICAL (64<-128) */ \
1470 V(alcgr, ALCGR, 0xB988) /* type = RRE ADD LOGICAL WITH CARRY (64) */ \
1471 V(slbgr, SLBGR, 0xB989) /* type = RRE SUBTRACT LOGICAL WITH BORROW (64) */ \
1472 V(cspg, CSPG, 0xB98A) /* type = RRE COMPARE AND SWAP AND PURGE (64) */ \
1473 V(epsw, EPSW, 0xB98D) /* type = RRE EXTRACT PSW */ \
1474 V(llcr, LLCR, 0xB994) /* type = RRE LOAD LOGICAL CHARACTER (32<-8) */ \
1475 V(llhr, LLHR, 0xB995) /* type = RRE LOAD LOGICAL HALFWORD (32<-16) */ \
1476 V(mlr, MLR, 0xB996) /* type = RRE MULTIPLY LOGICAL (64<-32) */ \
1477 V(dlr, DLR, 0xB997) /* type = RRE DIVIDE LOGICAL (32<-64) */ \
1478 V(alcr, ALCR, 0xB998) /* type = RRE ADD LOGICAL WITH CARRY (32) */ \
1479 V(slbr, SLBR, 0xB999) /* type = RRE SUBTRACT LOGICAL WITH BORROW (32) */ \
1480 V(epair, EPAIR, 0xB99A) /* type = RRE EXTRACT PRIMARY ASN AND INSTANCE */ \
1481 V(esair, ESAIR, \
1482 0xB99B) /* type = RRE EXTRACT SECONDARY ASN AND INSTANCE */ \
1483 V(esea, ESEA, 0xB99D) /* type = RRE EXTRACT AND SET EXTENDED AUTHORITY */ \
1484 V(pti, PTI, 0xB99E) /* type = RRE PROGRAM TRANSFER WITH INSTANCE */ \
1485 V(ssair, SSAIR, 0xB99F) /* type = RRE SET SECONDARY ASN WITH INSTANCE */ \
1486 V(ptf, PTF, 0xB9A2) /* type = RRE PERFORM TOPOLOGY FUNCTION */ \
1487 V(rrbm, RRBM, 0xB9AE) /* type = RRE RESET REFERENCE BITS MULTIPLE */ \
1488 V(pfmf, PFMF, 0xB9AF) /* type = RRE PERFORM FRAME MANAGEMENT FUNCTION */ \
1489 V(cu41, CU41, 0xB9B2) /* type = RRE CONVERT UTF-32 TO UTF-8 */ \
1490 V(cu42, CU42, 0xB9B3) /* type = RRE CONVERT UTF-32 TO UTF-16 */ \
1491 V(srstu, SRSTU, 0xB9BE) /* type = RRE SEARCH STRING UNICODE */ \
1492 V(chhr, CHHR, 0xB9CD) /* type = RRE COMPARE HIGH (32) */ \
1493 V(clhhr, CLHHR, 0xB9CF) /* type = RRE COMPARE LOGICAL HIGH (32) */ \
1494 V(chlr, CHLR, 0xB9DD) /* type = RRE COMPARE HIGH (32) */ \
1495 V(clhlr, CLHLR, 0xB9DF) /* type = RRE COMPARE LOGICAL HIGH (32) */ \
1496 V(popcnt, POPCNT_Z, 0xB9E1) /* type = RRE POPULATION COUNT */
1497
1498 #define S390_RIE_C_OPCODE_LIST(V) \
1499 V(cgij, CGIJ, \
1500 0xEC7C) /* type = RIE_C COMPARE IMMEDIATE AND BRANCH RELATIVE (64<-8) */ \
1501 V(clgij, CLGIJ, \
1502 0xEC7D) /* type = RIE_C COMPARE LOGICAL IMMEDIATE AND BRANCH RELATIVE */ \
1503 /* (64<-8) */ \
1504 V(cij, CIJ, \
1505 0xEC7E) /* type = RIE_C COMPARE IMMEDIATE AND BRANCH RELATIVE (32<-8) */ \
1506 V(clij, CLIJ, 0xEC7F) /* type = RIE_C COMPARE LOGICAL IMMEDIATE AND */ \
1507 /* BRANCH RELATIVE (32<-8) */
1508
1509 #define S390_RIE_D_OPCODE_LIST(V) \
1510 V(ahik, AHIK, 0xECD8) /* type = RIE_D ADD IMMEDIATE (32<-16) */ \
1511 V(aghik, AGHIK, 0xECD9) /* type = RIE_D ADD IMMEDIATE (64<-16) */ \
1512 V(alhsik, ALHSIK, \
1513 0xECDA) /* type = RIE_D ADD LOGICAL WITH SIGNED IMMEDIATE (32<-16) */ \
1514 V(alghsik, ALGHSIK, \
1515 0xECDB) /* type = RIE_D ADD LOGICAL WITH SIGNED IMMEDIATE (64<-16) */
1516
1517 #define S390_VRV_OPCODE_LIST(V) \
1518 V(vgeg, VGEG, 0xE712) /* type = VRV VECTOR GATHER ELEMENT (64) */ \
1519 V(vgef, VGEF, 0xE713) /* type = VRV VECTOR GATHER ELEMENT (32) */ \
1520 V(vsceg, VSCEG, 0xE71A) /* type = VRV VECTOR SCATTER ELEMENT (64) */ \
1521 V(vscef, VSCEF, 0xE71B) /* type = VRV VECTOR SCATTER ELEMENT (32) */
1522
1523 #define S390_RIE_E_OPCODE_LIST(V) \
1524 V(brxhg, BRXHG, \
1525 0xEC44) /* type = RIE_E BRANCH RELATIVE ON INDEX HIGH (64) */ \
1526 V(brxlg, BRXLG, \
1527 0xEC45) /* type = RIE_E BRANCH RELATIVE ON INDEX LOW OR EQ. (64) */
1528
1529 #define S390_RR_OPCODE_LIST(V) \
1530 V(spm, SPM, 0x04) /* type = RR SET PROGRAM MASK */ \
1531 V(balr, BALR, 0x05) /* type = RR BRANCH AND LINK */ \
1532 V(bctr, BCTR, 0x06) /* type = RR BRANCH ON COUNT (32) */ \
1533 V(bcr, BCR, 0x07) /* type = RR BRANCH ON CONDITION */ \
1534 V(bsm, BSM, 0x0B) /* type = RR BRANCH AND SET MODE */ \
1535 V(bassm, BASSM, 0x0C) /* type = RR BRANCH AND SAVE AND SET MODE */ \
1536 V(basr, BASR, 0x0D) /* type = RR BRANCH AND SAVE */ \
1537 V(mvcl, MVCL, 0x0E) /* type = RR MOVE LONG */ \
1538 V(clcl, CLCL, 0x0F) /* type = RR COMPARE LOGICAL LONG */ \
1539 V(lpr, LPR, 0x10) /* type = RR LOAD POSITIVE (32) */ \
1540 V(lnr, LNR, 0x11) /* type = RR LOAD NEGATIVE (32) */ \
1541 V(ltr, LTR, 0x12) /* type = RR LOAD AND TEST (32) */ \
1542 V(lcr, LCR, 0x13) /* type = RR LOAD COMPLEMENT (32) */ \
1543 V(nr, NR, 0x14) /* type = RR AND (32) */ \
1544 V(clr, CLR, 0x15) /* type = RR COMPARE LOGICAL (32) */ \
1545 V(or, OR, 0x16) /* type = RR OR (32) */ \
1546 V(xr, XR, 0x17) /* type = RR EXCLUSIVE OR (32) */ \
1547 V(lr, LR, 0x18) /* type = RR LOAD (32) */ \
1548 V(cr, CR, 0x19) /* type = RR COMPARE (32) */ \
1549 V(ar, AR, 0x1A) /* type = RR ADD (32) */ \
1550 V(sr, SR, 0x1B) /* type = RR SUBTRACT (32) */ \
1551 V(mr, MR, 0x1C) /* type = RR MULTIPLY (64<-32) */ \
1552 V(dr, DR, 0x1D) /* type = RR DIVIDE (32<-64) */ \
1553 V(alr, ALR, 0x1E) /* type = RR ADD LOGICAL (32) */ \
1554 V(slr, SLR, 0x1F) /* type = RR SUBTRACT LOGICAL (32) */ \
1555 V(lpdr, LPDR, 0x20) /* type = RR LOAD POSITIVE (long HFP) */ \
1556 V(lndr, LNDR, 0x21) /* type = RR LOAD NEGATIVE (long HFP) */ \
1557 V(ltdr, LTDR, 0x22) /* type = RR LOAD AND TEST (long HFP) */ \
1558 V(lcdr, LCDR, 0x23) /* type = RR LOAD COMPLEMENT (long HFP) */ \
1559 V(hdr, HDR, 0x24) /* type = RR HALVE (long HFP) */ \
1560 V(ldxr, LDXR, 0x25) /* type = RR LOAD ROUNDED (extended to long HFP) */ \
1561 V(lrdr, LRDR, 0x25) /* type = RR LOAD ROUNDED (extended to long HFP) */ \
1562 V(mxr, MXR, 0x26) /* type = RR MULTIPLY (extended HFP) */ \
1563 V(mxdr, MXDR, 0x27) /* type = RR MULTIPLY (long to extended HFP) */ \
1564 V(ldr, LDR, 0x28) /* type = RR LOAD (long) */ \
1565 V(cdr, CDR, 0x29) /* type = RR COMPARE (long HFP) */ \
1566 V(adr, ADR, 0x2A) /* type = RR ADD NORMALIZED (long HFP) */ \
1567 V(sdr, SDR, 0x2B) /* type = RR SUBTRACT NORMALIZED (long HFP) */ \
1568 V(mdr, MDR, 0x2C) /* type = RR MULTIPLY (long HFP) */ \
1569 V(ddr, DDR, 0x2D) /* type = RR DIVIDE (long HFP) */ \
1570 V(swr, SWR, 0x2F) /* type = RR SUBTRACT UNNORMALIZED (long HFP) */ \
1571 V(lper, LPER, 0x30) /* type = RR LOAD POSITIVE (short HFP) */ \
1572 V(lner, LNER, 0x31) /* type = RR LOAD NEGATIVE (short HFP) */ \
1573 V(lter, LTER, 0x32) /* type = RR LOAD AND TEST (short HFP) */ \
1574 V(lcer, LCER, 0x33) /* type = RR LOAD COMPLEMENT (short HFP) */ \
1575 V(her_z, HER_Z, 0x34) /* type = RR HALVE (short HFP) */ \
1576 V(ledr, LEDR, 0x35) /* type = RR LOAD ROUNDED (long to short HFP) */ \
1577 V(lrer, LRER, 0x35) /* type = RR LOAD ROUNDED (long to short HFP) */ \
1578 V(axr, AXR, 0x36) /* type = RR ADD NORMALIZED (extended HFP) */ \
1579 V(sxr, SXR, 0x37) /* type = RR SUBTRACT NORMALIZED (extended HFP) */ \
1580 V(ler, LER, 0x38) /* type = RR LOAD (short) */ \
1581 V(cer, CER, 0x39) /* type = RR COMPARE (short HFP) */ \
1582 V(aer, AER, 0x3A) /* type = RR ADD NORMALIZED (short HFP) */ \
1583 V(ser, SER, 0x3B) /* type = RR SUBTRACT NORMALIZED (short HFP) */ \
1584 V(mder, MDER, 0x3C) /* type = RR MULTIPLY (short to long HFP) */ \
1585 V(mer, MER, 0x3C) /* type = RR MULTIPLY (short to long HFP) */ \
1586 V(der, DER, 0x3D) /* type = RR DIVIDE (short HFP) */ \
1587 V(aur, AUR, 0x3E) /* type = RR ADD UNNORMALIZED (short HFP) */ \
1588 V(sur, SUR, 0x3F) /* type = RR SUBTRACT UNNORMALIZED (short HFP) */ \
1589 V(sth, STH, 0x40) /* type = RR STORE HALFWORD (16) */
1590
1591 #define S390_RIE_F_OPCODE_LIST(V) \
1592 V(risblg, RISBLG, \
1593 0xEC51) /* type = RIE_F ROTATE THEN INSERT SELECTED BITS LOW (64) */ \
1594 V(rnsbg, RNSBG, \
1595 0xEC54) /* type = RIE_F ROTATE THEN AND SELECTED BITS (64) */ \
1596 V(risbg, RISBG, \
1597 0xEC55) /* type = RIE_F ROTATE THEN INSERT SELECTED BITS (64) */ \
1598 V(rosbg, ROSBG, 0xEC56) /* type = RIE_F ROTATE THEN OR SELECTED BITS (64) */ \
1599 V(rxsbg, RXSBG, \
1600 0xEC57) /* type = RIE_F ROTATE THEN EXCLUSIVE OR SELECT. BITS (64) */ \
1601 V(risbgn, RISBGN, \
1602 0xEC59) /* type = RIE_F ROTATE THEN INSERT SELECTED BITS (64) */ \
1603 V(risbhg, RISBHG, \
1604 0xEC5D) /* type = RIE_F ROTATE THEN INSERT SELECTED BITS HIGH (64) */
1605
1606 #define S390_VRX_OPCODE_LIST(V) \
1607 V(vleb, VLEB, 0xE700) /* type = VRX VECTOR LOAD ELEMENT (8) */ \
1608 V(vleh, VLEH, 0xE701) /* type = VRX VECTOR LOAD ELEMENT (16) */ \
1609 V(vleg, VLEG, 0xE702) /* type = VRX VECTOR LOAD ELEMENT (64) */ \
1610 V(vlef, VLEF, 0xE703) /* type = VRX VECTOR LOAD ELEMENT (32) */ \
1611 V(vllez, VLLEZ, \
1612 0xE704) /* type = VRX VECTOR LOAD LOGICAL ELEMENT AND ZERO */ \
1613 V(vlrep, VLREP, 0xE705) /* type = VRX VECTOR LOAD AND REPLICATE */ \
1614 V(vl, VL, 0xE706) /* type = VRX VECTOR LOAD */ \
1615 V(vlbb, VLBB, 0xE707) /* type = VRX VECTOR LOAD TO BLOCK BOUNDARY */ \
1616 V(vsteb, VSTEB, 0xE708) /* type = VRX VECTOR STORE ELEMENT (8) */ \
1617 V(vsteh, VSTEH, 0xE709) /* type = VRX VECTOR STORE ELEMENT (16) */ \
1618 V(vsteg, VSTEG, 0xE70A) /* type = VRX VECTOR STORE ELEMENT (64) */ \
1619 V(vstef, VSTEF, 0xE70B) /* type = VRX VECTOR STORE ELEMENT (32) */ \
1620 V(vst, VST, 0xE70E) /* type = VRX VECTOR STORE */
1621
1622 #define S390_RIE_G_OPCODE_LIST(V) \
1623 V(lochi, LOCHI, \
1624 0xEC42) /* type = RIE_G LOAD HALFWORD IMMEDIATE ON CONDITION (32<-16) */ \
1625 V(locghi, LOCGHI, \
1626 0xEC46) /* type = RIE_G LOAD HALFWORD IMMEDIATE ON CONDITION (64<-16) */ \
1627 V(lochhi, LOCHHI, 0xEC4E) /* type = RIE_G LOAD HALFWORD HIGH IMMEDIATE */ \
1628 /* ON CONDITION (32<-16) */
1629
1630 #define S390_RRS_OPCODE_LIST(V) \
1631 V(cgrb, CGRB, 0xECE4) /* type = RRS COMPARE AND BRANCH (64) */ \
1632 V(clgrb, CLGRB, 0xECE5) /* type = RRS COMPARE LOGICAL AND BRANCH (64) */ \
1633 V(crb, CRB, 0xECF6) /* type = RRS COMPARE AND BRANCH (32) */ \
1634 V(clrb, CLRB, 0xECF7) /* type = RRS COMPARE LOGICAL AND BRANCH (32) */
1635
1636 #define S390_OPCODE_LIST(V) \
1637 S390_RSY_A_OPCODE_LIST(V) \
1638 S390_RSY_B_OPCODE_LIST(V) \
1639 S390_RXE_OPCODE_LIST(V) \
1640 S390_RRF_A_OPCODE_LIST(V) \
1641 S390_RXF_OPCODE_LIST(V) \
1642 S390_IE_OPCODE_LIST(V) \
1643 S390_RRF_B_OPCODE_LIST(V) \
1644 S390_RRF_C_OPCODE_LIST(V) \
1645 S390_MII_OPCODE_LIST(V) \
1646 S390_RRF_D_OPCODE_LIST(V) \
1647 S390_RRF_E_OPCODE_LIST(V) \
1648 S390_VRR_A_OPCODE_LIST(V) \
1649 S390_VRR_B_OPCODE_LIST(V) \
1650 S390_VRR_C_OPCODE_LIST(V) \
1651 S390_VRI_A_OPCODE_LIST(V) \
1652 S390_VRR_D_OPCODE_LIST(V) \
1653 S390_VRI_B_OPCODE_LIST(V) \
1654 S390_VRR_E_OPCODE_LIST(V) \
1655 S390_VRI_C_OPCODE_LIST(V) \
1656 S390_VRI_D_OPCODE_LIST(V) \
1657 S390_VRR_F_OPCODE_LIST(V) \
1658 S390_RIS_OPCODE_LIST(V) \
1659 S390_VRI_E_OPCODE_LIST(V) \
1660 S390_RSL_A_OPCODE_LIST(V) \
1661 S390_RSL_B_OPCODE_LIST(V) \
1662 S390_SI_OPCODE_LIST(V) \
1663 S390_SIL_OPCODE_LIST(V) \
1664 S390_VRS_A_OPCODE_LIST(V) \
1665 S390_RIL_A_OPCODE_LIST(V) \
1666 S390_RIL_B_OPCODE_LIST(V) \
1667 S390_VRS_B_OPCODE_LIST(V) \
1668 S390_RIL_C_OPCODE_LIST(V) \
1669 S390_VRS_C_OPCODE_LIST(V) \
1670 S390_RI_A_OPCODE_LIST(V) \
1671 S390_RSI_OPCODE_LIST(V) \
1672 S390_RI_B_OPCODE_LIST(V) \
1673 S390_RI_C_OPCODE_LIST(V) \
1674 S390_RSL_OPCODE_LIST(V) \
1675 S390_SMI_OPCODE_LIST(V) \
1676 S390_RXY_A_OPCODE_LIST(V) \
1677 S390_RXY_B_OPCODE_LIST(V) \
1678 S390_SIY_OPCODE_LIST(V) \
1679 S390_SS_A_OPCODE_LIST(V) \
1680 S390_E_OPCODE_LIST(V) \
1681 S390_SS_B_OPCODE_LIST(V) \
1682 S390_SS_C_OPCODE_LIST(V) \
1683 S390_SS_D_OPCODE_LIST(V) \
1684 S390_SS_E_OPCODE_LIST(V) \
1685 S390_I_OPCODE_LIST(V) \
1686 S390_SS_F_OPCODE_LIST(V) \
1687 S390_SSE_OPCODE_LIST(V) \
1688 S390_SSF_OPCODE_LIST(V) \
1689 S390_RS_A_OPCODE_LIST(V) \
1690 S390_RS_B_OPCODE_LIST(V) \
1691 S390_S_OPCODE_LIST(V) \
1692 S390_RX_A_OPCODE_LIST(V) \
1693 S390_RX_B_OPCODE_LIST(V) \
1694 S390_RIE_A_OPCODE_LIST(V) \
1695 S390_RRD_OPCODE_LIST(V) \
1696 S390_RIE_B_OPCODE_LIST(V) \
1697 S390_RRE_OPCODE_LIST(V) \
1698 S390_RIE_C_OPCODE_LIST(V) \
1699 S390_RIE_D_OPCODE_LIST(V) \
1700 S390_VRV_OPCODE_LIST(V) \
1701 S390_RIE_E_OPCODE_LIST(V) \
1702 S390_RR_OPCODE_LIST(V) \
1703 S390_RIE_F_OPCODE_LIST(V) \
1704 S390_VRX_OPCODE_LIST(V) \
1705 S390_RIE_G_OPCODE_LIST(V) \
1706 S390_RRS_OPCODE_LIST(V)
178 1707
179 // Opcodes as defined in Appendix B-2 table 1708 // Opcodes as defined in Appendix B-2 table
180 enum Opcode { 1709 enum Opcode {
181 #define DECLARE_OPCODES(name, opcode_name, opcode_value) \ 1710 #define DECLARE_OPCODES(name, opcode_name, opcode_value) \
182 opcode_name = opcode_value, 1711 opcode_name = opcode_value,
183 VRR_A_OPCODE_LIST(DECLARE_OPCODES) VRR_C_OPCODE_LIST(DECLARE_OPCODES) 1712 S390_OPCODE_LIST(DECLARE_OPCODES)
184 #undef DECLARE_OPCODES 1713 #undef DECLARE_OPCODES
185 1714
186 A = 0x5A, // Add (32) 1715 BKPT = 0x0001, // GDB Software Breakpoint
187 ADB = 0xED1A, // Add (long BFP)
188 ADBR = 0xB31A, // Add (long BFP)
189 ADTR = 0xB3D2, // Add (long DFP)
190 ADTRA = 0xB3D2, // Add (long DFP)
191 AEB = 0xED0A, // Add (short BFP)
192 AEBR = 0xB30A, // Add (short BFP)
193 AFI = 0xC29, // Add Immediate (32)
194 AG = 0xE308, // Add (64)
195 AGF = 0xE318, // Add (64<-32)
196 AGFI = 0xC28, // Add Immediate (64<-32)
197 AGFR = 0xB918, // Add (64<-32)
198 AGHI = 0xA7B, // Add Halfword Immediate (64)
199 AGHIK = 0xECD9, // Add Immediate (64<-16)
200 AGR = 0xB908, // Add (64)
201 AGRK = 0xB9E8, // Add (64)
202 AGSI = 0xEB7A, // Add Immediate (64<-8)
203 AH = 0x4A, // Add Halfword
204 AHHHR = 0xB9C8, // Add High (32)
205 AHHLR = 0xB9D8, // Add High (32)
206 AHI = 0xA7A, // Add Halfword Immediate (32)
207 AHIK = 0xECD8, // Add Immediate (32<-16)
208 AHY = 0xE37A, // Add Halfword
209 AIH = 0xCC8, // Add Immediate High (32)
210 AL = 0x5E, // Add Logical (32)
211 ALC = 0xE398, // Add Logical With Carry (32)
212 ALCG = 0xE388, // Add Logical With Carry (64)
213 ALCGR = 0xB988, // Add Logical With Carry (64)
214 ALCR = 0xB998, // Add Logical With Carry (32)
215 ALFI = 0xC2B, // Add Logical Immediate (32)
216 ALG = 0xE30A, // Add Logical (64)
217 ALGF = 0xE31A, // Add Logical (64<-32)
218 ALGFI = 0xC2A, // Add Logical Immediate (64<-32)
219 ALGFR = 0xB91A, // Add Logical (64<-32)
220 ALGHSIK = 0xECDB, // Add Logical With Signed Immediate (64<-16)
221 ALGR = 0xB90A, // Add Logical (64)
222 ALGRK = 0xB9EA, // Add Logical (64)
223 ALGSI = 0xEB7E, // Add Logical With Signed Immediate (64<-8)
224 ALHHHR = 0xB9CA, // Add Logical High (32)
225 ALHHLR = 0xB9DA, // Add Logical High (32)
226 ALHSIK = 0xECDA, // Add Logical With Signed Immediate (32<-16)
227 ALR = 0x1E, // Add Logical (32)
228 ALRK = 0xB9FA, // Add Logical (32)
229 ALSI = 0xEB6E, // Add Logical With Signed Immediate (32<-8)
230 ALSIH = 0xCCA, // Add Logical With Signed Immediate High (32)
231 ALSIHN = 0xCCB, // Add Logical With Signed Immediate High (32)
232 ALY = 0xE35E, // Add Logical (32)
233 AP = 0xFA, // Add Decimal
234 AR = 0x1A, // Add (32)
235 ARK = 0xB9F8, // Add (32)
236 ASI = 0xEB6A, // Add Immediate (32<-8)
237 AXBR = 0xB34A, // Add (extended BFP)
238 AXTR = 0xB3DA, // Add (extended DFP)
239 AXTRA = 0xB3DA, // Add (extended DFP)
240 AY = 0xE35A, // Add (32)
241 BAL = 0x45, // Branch And Link
242 BALR = 0x05, // Branch And Link
243 BAS = 0x4D, // Branch And Save
244 BASR = 0x0D, // Branch And Save
245 BASSM = 0x0C, // Branch And Save And Set Mode
246 BC = 0x47, // Branch On Condition
247 BCR = 0x07, // Branch On Condition
248 BCT = 0x46, // Branch On Count (32)
249 BCTG = 0xE346, // Branch On Count (64)
250 BCTGR = 0xB946, // Branch On Count (64)
251 BCTR = 0x06, // Branch On Count (32)
252 BPP = 0xC7, // Branch Prediction Preload
253 BPRP = 0xC5, // Branch Prediction Relative Preload
254 BRAS = 0xA75, // Branch Relative And Save
255 BRASL = 0xC05, // Branch Relative And Save Long
256 BRC = 0xA74, // Branch Relative On Condition
257 BRCL = 0xC04, // Branch Relative On Condition Long
258 BRCT = 0xA76, // Branch Relative On Count (32)
259 BRCTG = 0xA77, // Branch Relative On Count (64)
260 BRCTH = 0xCC6, // Branch Relative On Count High (32)
261 BRXH = 0x84, // Branch Relative On Index High (32)
262 BRXHG = 0xEC44, // Branch Relative On Index High (64)
263 BRXLE = 0x85, // Branch Relative On Index Low Or Eq. (32)
264 BRXLG = 0xEC45, // Branch Relative On Index Low Or Eq. (64)
265 BSM = 0x0B, // Branch And Set Mode
266 BXH = 0x86, // Branch On Index High (32)
267 BXHG = 0xEB44, // Branch On Index High (64)
268 BXLE = 0x87, // Branch On Index Low Or Equal (32)
269 BXLEG = 0xEB45, // Branch On Index Low Or Equal (64)
270 C = 0x59, // Compare (32)
271 CDB = 0xED19, // Compare (long BFP)
272 CDBR = 0xB319, // Compare (long BFP)
273 CDFBR = 0xB395, // Convert From Fixed (32 to long BFP)
274 CDFBRA = 0xB395, // Convert From Fixed (32 to long BFP)
275 CDFTR = 0xB951, // Convert From Fixed (32 to long DFP)
276 CDGBR = 0xB3A5, // Convert From Fixed (64 to long BFP)
277 CDGBRA = 0xB3A5, // Convert From Fixed (64 to long BFP)
278 CDGTR = 0xB3F1, // Convert From Fixed (64 to long DFP)
279 CDGTRA = 0xB3F1, // Convert From Fixed (64 to long DFP)
280 CDLFBR = 0xB391, // Convert From Logical (32 to long BFP)
281 CDLFTR = 0xB953, // Convert From Logical (32 to long DFP)
282 CDLGBR = 0xB3A1, // Convert From Logical (64 to long BFP)
283 CDLGTR = 0xB952, // Convert From Logical (64 to long DFP)
284 CDS = 0xBB, // Compare Double And Swap (32)
285 CDSG = 0xEB3E, // Compare Double And Swap (64)
286 CDSTR = 0xB3F3, // Convert From Signed Packed (64 to long DFP)
287 CDSY = 0xEB31, // Compare Double And Swap (32)
288 CDTR = 0xB3E4, // Compare (long DFP)
289 CDUTR = 0xB3F2, // Convert From Unsigned Packed (64 to long DFP)
290 CDZT = 0xEDAA, // Convert From Zoned (to long DFP)
291 CEB = 0xED09, // Compare (short BFP)
292 CEBR = 0xB309, // Compare (short BFP)
293 CEDTR = 0xB3F4, // Compare Biased Exponent (long DFP)
294 CEFBR = 0xB394, // Convert From Fixed (32 to short BFP)
295 CEFBRA = 0xB394, // Convert From Fixed (32 to short BFP)
296 CEGBR = 0xB3A4, // Convert From Fixed (64 to short BFP)
297 CEGBRA = 0xB3A4, // Convert From Fixed (64 to short BFP)
298 CELFBR = 0xB390, // Convert From Logical (32 to short BFP)
299 CELGBR = 0xB3A0, // Convert From Logical (64 to short BFP)
300 CEXTR = 0xB3FC, // Compare Biased Exponent (extended DFP)
301 CFC = 0xB21A, // Compare And Form Codeword
302 CFDBR = 0xB399, // Convert To Fixed (long BFP to 32)
303 CFDBRA = 0xB399, // Convert To Fixed (long BFP to 32)
304 CFDR = 0xB3B9, // Convert To Fixed (long HFP to 32)
305 CFDTR = 0xB941, // Convert To Fixed (long DFP to 32)
306 CFEBR = 0xB398, // Convert To Fixed (short BFP to 32)
307 CFEBRA = 0xB398, // Convert To Fixed (short BFP to 32)
308 CFER = 0xB3B8, // Convert To Fixed (short HFP to 32)
309 CFI = 0xC2D, // Compare Immediate (32)
310 CFXBR = 0xB39A, // Convert To Fixed (extended BFP to 32)
311 CFXBRA = 0xB39A, // Convert To Fixed (extended BFP to 32)
312 CFXR = 0xB3BA, // Convert To Fixed (extended HFP to 32)
313 CFXTR = 0xB949, // Convert To Fixed (extended DFP to 32)
314 CG = 0xE320, // Compare (64)
315 CGDBR = 0xB3A9, // Convert To Fixed (long BFP to 64)
316 CGDBRA = 0xB3A9, // Convert To Fixed (long BFP to 64)
317 CGDR = 0xB3C9, // Convert To Fixed (long HFP to 64)
318 CGDTR = 0xB3E1, // Convert To Fixed (long DFP to 64)
319 CGDTRA = 0xB3E1, // Convert To Fixed (long DFP to 64)
320 CGEBR = 0xB3A8, // Convert To Fixed (short BFP to 64)
321 CGEBRA = 0xB3A8, // Convert To Fixed (short BFP to 64)
322 CGER = 0xB3C8, // Convert To Fixed (short HFP to 64)
323 CGF = 0xE330, // Compare (64<-32)
324 CGFI = 0xC2C, // Compare Immediate (64<-32)
325 CGFR = 0xB930, // Compare (64<-32)
326 CGFRL = 0xC6C, // Compare Relative Long (64<-32)
327 CGH = 0xE334, // Compare Halfword (64<-16)
328 CGHI = 0xA7F, // Compare Halfword Immediate (64<-16)
329 CGHRL = 0xC64, // Compare Halfword Relative Long (64<-16)
330 CGHSI = 0xE558, // Compare Halfword Immediate (64<-16)
331 CGIB = 0xECFC, // Compare Immediate And Branch (64<-8)
332 CGIJ = 0xEC7C, // Compare Immediate And Branch Relative (64<-8)
333 CGIT = 0xEC70, // Compare Immediate And Trap (64<-16)
334 CGR = 0xB920, // Compare (64)
335 CGRB = 0xECE4, // Compare And Branch (64)
336 CGRJ = 0xEC64, // Compare And Branch Relative (64)
337 CGRL = 0xC68, // Compare Relative Long (64)
338 CGRT = 0xB960, // Compare And Trap (64)
339 CGXBR = 0xB3AA, // Convert To Fixed (extended BFP to 64)
340 CGXBRA = 0xB3AA, // Convert To Fixed (extended BFP to 64)
341 CGXR = 0xB3CA, // Convert To Fixed (extended HFP to 64)
342 CGXTR = 0xB3E9, // Convert To Fixed (extended DFP to 64)
343 CGXTRA = 0xB3E9, // Convert To Fixed (extended DFP to 64)
344 CH = 0x49, // Compare Halfword (32<-16)
345 CHF = 0xE3CD, // Compare High (32)
346 CHHR = 0xB9CD, // Compare High (32)
347 CHHSI = 0xE554, // Compare Halfword Immediate (16)
348 CHI = 0xA7E, // Compare Halfword Immediate (32<-16)
349 CHLR = 0xB9DD, // Compare High (32)
350 CHRL = 0xC65, // Compare Halfword Relative Long (32<-16)
351 CHSI = 0xE55C, // Compare Halfword Immediate (32<-16)
352 CHY = 0xE379, // Compare Halfword (32<-16)
353 CIB = 0xECFE, // Compare Immediate And Branch (32<-8)
354 CIH = 0xCCD, // Compare Immediate High (32)
355 CIJ = 0xEC7E, // Compare Immediate And Branch Relative (32<-8)
356 CIT = 0xEC72, // Compare Immediate And Trap (32<-16)
357 CKSM = 0xB241, // Checksum
358 CL = 0x55, // Compare Logical (32)
359 CLC = 0xD5, // Compare Logical (character)
360 CLCL = 0x0F, // Compare Logical Long
361 CLCLE = 0xA9, // Compare Logical Long Extended
362 CLCLU = 0xEB8F, // Compare Logical Long Unicode
363 CLFDBR = 0xB39D, // Convert To Logical (long BFP to 32)
364 CLFDTR = 0xB943, // Convert To Logical (long DFP to 32)
365 CLFEBR = 0xB39C, // Convert To Logical (short BFP to 32)
366 CLFHSI = 0xE55D, // Compare Logical Immediate (32<-16)
367 CLFI = 0xC2F, // Compare Logical Immediate (32)
368 CLFIT = 0xEC73, // Compare Logical Immediate And Trap (32<-16)
369 CLFXBR = 0xB39E, // Convert To Logical (extended BFP to 32)
370 CLFXTR = 0xB94B, // Convert To Logical (extended DFP to 32)
371 CLG = 0xE321, // Compare Logical (64)
372 CLGDBR = 0xB3AD, // Convert To Logical (long BFP to 64)
373 CLGDTR = 0xB942, // Convert To Logical (long DFP to 64)
374 CLGEBR = 0xB3AC, // Convert To Logical (short BFP to 64)
375 CLGF = 0xE331, // Compare Logical (64<-32)
376 CLGFI = 0xC2E, // Compare Logical Immediate (64<-32)
377 CLGR = 0xB921, // Compare Logical (64)
378 CLI = 0x95, // Compare Logical Immediate (8)
379 CLIY = 0xEB55, // Compare Logical Immediate (8)
380 CLR = 0x15, // Compare Logical (32)
381 CLY = 0xE355, // Compare Logical (32)
382 CD = 0x69, // Compare (LH)
383 CDR = 0x29, // Compare (LH)
384 CR = 0x19, // Compare (32)
385 CSST = 0xC82, // Compare And Swap And Store
386 CSXTR = 0xB3EB, // Convert To Signed Packed (extended DFP to 128)
387 CSY = 0xEB14, // Compare And Swap (32)
388 CU12 = 0xB2A7, // Convert Utf-8 To Utf-16
389 CU14 = 0xB9B0, // Convert Utf-8 To Utf-32
390 CU21 = 0xB2A6, // Convert Utf-16 To Utf-8
391 CU24 = 0xB9B1, // Convert Utf-16 To Utf-32
392 CU41 = 0xB9B2, // Convert Utf-32 To Utf-8
393 CU42 = 0xB9B3, // Convert Utf-32 To Utf-16
394 CUDTR = 0xB3E2, // Convert To Unsigned Packed (long DFP to 64)
395 CUSE = 0xB257, // Compare Until Substring Equal
396 CUTFU = 0xB2A7, // Convert Utf-8 To Unicode
397 CUUTF = 0xB2A6, // Convert Unicode To Utf-8
398 CUXTR = 0xB3EA, // Convert To Unsigned Packed (extended DFP to 128)
399 CVB = 0x4F, // Convert To Binary (32)
400 CVBG = 0xE30E, // Convert To Binary (64)
401 CVBY = 0xE306, // Convert To Binary (32)
402 CVD = 0x4E, // Convert To Decimal (32)
403 CVDG = 0xE32E, // Convert To Decimal (64)
404 CVDY = 0xE326, // Convert To Decimal (32)
405 CXBR = 0xB349, // Compare (extended BFP)
406 CXFBR = 0xB396, // Convert From Fixed (32 to extended BFP)
407 CXFBRA = 0xB396, // Convert From Fixed (32 to extended BFP)
408 CXFTR = 0xB959, // Convert From Fixed (32 to extended DFP)
409 CXGBR = 0xB3A6, // Convert From Fixed (64 to extended BFP)
410 CXGBRA = 0xB3A6, // Convert From Fixed (64 to extended BFP)
411 CXGTR = 0xB3F9, // Convert From Fixed (64 to extended DFP)
412 CXGTRA = 0xB3F9, // Convert From Fixed (64 to extended DFP)
413 CXLFBR = 0xB392, // Convert From Logical (32 to extended BFP)
414 CXLFTR = 0xB95B, // Convert From Logical (32 to extended DFP)
415 CXLGBR = 0xB3A2, // Convert From Logical (64 to extended BFP)
416 CXLGTR = 0xB95A, // Convert From Logical (64 to extended DFP)
417 CXSTR = 0xB3FB, // Convert From Signed Packed (128 to extended DFP)
418 CXTR = 0xB3EC, // Compare (extended DFP)
419 CXUTR = 0xB3FA, // Convert From Unsigned Packed (128 to ext. DFP)
420 CXZT = 0xEDAB, // Convert From Zoned (to extended DFP)
421 CY = 0xE359, // Compare (32)
422 CZDT = 0xEDA8, // Convert To Zoned (from long DFP)
423 CZXT = 0xEDA9, // Convert To Zoned (from extended DFP)
424 D = 0x5D, // Divide (32<-64)
425 DDB = 0xED1D, // Divide (long BFP)
426 DDBR = 0xB31D, // Divide (long BFP)
427 DDTR = 0xB3D1, // Divide (long DFP)
428 DDTRA = 0xB3D1, // Divide (long DFP)
429 DEB = 0xED0D, // Divide (short BFP)
430 DEBR = 0xB30D, // Divide (short BFP)
431 DIDBR = 0xB35B, // Divide To Integer (long BFP)
432 DIEBR = 0xB353, // Divide To Integer (short BFP)
433 DL = 0xE397, // Divide Logical (32<-64)
434 DLG = 0xE387, // Divide Logical (64<-128)
435 DLGR = 0xB987, // Divide Logical (64<-128)
436 DLR = 0xB997, // Divide Logical (32<-64)
437 DP = 0xFD, // Divide Decimal
438 DR = 0x1D, // Divide (32<-64)
439 DSG = 0xE30D, // Divide Single (64)
440 DSGF = 0xE31D, // Divide Single (64<-32)
441 DSGFR = 0xB91D, // Divide Single (64<-32)
442 DSGR = 0xB90D, // Divide Single (64)
443 DXBR = 0xB34D, // Divide (extended BFP)
444 DXTR = 0xB3D9, // Divide (extended DFP)
445 DXTRA = 0xB3D9, // Divide (extended DFP)
446 EAR = 0xB24F, // Extract Access
447 ECAG = 0xEB4C, // Extract Cache Attribute
448 ECTG = 0xC81, // Extract Cpu Time
449 ED = 0xDE, // Edit
450 EDMK = 0xDF, // Edit And Mark
451 EEDTR = 0xB3E5, // Extract Biased Exponent (long DFP to 64)
452 EEXTR = 0xB3ED, // Extract Biased Exponent (extended DFP to 64)
453 EFPC = 0xB38C, // Extract Fpc
454 EPSW = 0xB98D, // Extract Psw
455 ESDTR = 0xB3E7, // Extract Significance (long DFP)
456 ESXTR = 0xB3EF, // Extract Significance (extended DFP)
457 ETND = 0xB2EC, // Extract Transaction Nesting Depth
458 EX = 0x44, // Execute
459 EXRL = 0xC60, // Execute Relative Long
460 FIDBR = 0xB35F, // Load Fp Integer (long BFP)
461 FIDBRA = 0xB35F, // Load Fp Integer (long BFP)
462 FIDTR = 0xB3D7, // Load Fp Integer (long DFP)
463 FIEBR = 0xB357, // Load Fp Integer (short BFP)
464 FIEBRA = 0xB357, // Load Fp Integer (short BFP)
465 FIXBR = 0xB347, // Load Fp Integer (extended BFP)
466 FIXBRA = 0xB347, // Load Fp Integer (extended BFP)
467 FIXTR = 0xB3DF, // Load Fp Integer (extended DFP)
468 FLOGR = 0xB983, // Find Leftmost One
469 HSCH = 0xB231, // Halt Subchannel
470 IC_z = 0x43, // Insert Character
471 ICM = 0xBF, // Insert Characters Under Mask (low)
472 ICMH = 0xEB80, // Insert Characters Under Mask (high)
473 ICMY = 0xEB81, // Insert Characters Under Mask (low)
474 ICY = 0xE373, // Insert Character
475 IEDTR = 0xB3F6, // Insert Biased Exponent (64 to long DFP)
476 IEXTR = 0xB3FE, // Insert Biased Exponent (64 to extended DFP)
477 IIHF = 0xC08, // Insert Immediate (high)
478 IIHH = 0xA50, // Insert Immediate (high high)
479 IIHL = 0xA51, // Insert Immediate (high low)
480 IILF = 0xC09, // Insert Immediate (low)
481 IILH = 0xA52, // Insert Immediate (low high)
482 IILL = 0xA53, // Insert Immediate (low low)
483 IPM = 0xB222, // Insert Program Mask
484 KDB = 0xED18, // Compare And Signal (long BFP)
485 KDBR = 0xB318, // Compare And Signal (long BFP)
486 KDTR = 0xB3E0, // Compare And Signal (long DFP)
487 KEB = 0xED08, // Compare And Signal (short BFP)
488 KEBR = 0xB308, // Compare And Signal (short BFP)
489 KIMD = 0xB93E, // Compute Intermediate Message Digest
490 KLMD = 0xB93F, // Compute Last Message Digest
491 KM = 0xB92E, // Cipher Message
492 KMAC = 0xB91E, // Compute Message Authentication Code
493 KMC = 0xB92F, // Cipher Message With Chaining
494 KMCTR = 0xB92D, // Cipher Message With Counter
495 KMF = 0xB92A, // Cipher Message With Cfb
496 KMO = 0xB92B, // Cipher Message With Ofb
497 KXBR = 0xB348, // Compare And Signal (extended BFP)
498 KXTR = 0xB3E8, // Compare And Signal (extended DFP)
499 L = 0x58, // Load (32)
500 LA = 0x41, // Load Address
501 LAA = 0xEBF8, // Load And Add (32)
502 LAAG = 0xEBE8, // Load And Add (64)
503 LAAL = 0xEBFA, // Load And Add Logical (32)
504 LAALG = 0xEBEA, // Load And Add Logical (64)
505 LAE = 0x51, // Load Address Extended
506 LAEY = 0xE375, // Load Address Extended
507 LAN = 0xEBF4, // Load And And (32)
508 LANG = 0xEBE4, // Load And And (64)
509 LAO = 0xEBF6, // Load And Or (32)
510 LAOG = 0xEBE6, // Load And Or (64)
511 LARL = 0xC00, // Load Address Relative Long
512 LAT = 0xE39F, // Load And Trap (32L<-32)
513 LAX = 0xEBF7, // Load And Exclusive Or (32)
514 LAXG = 0xEBE7, // Load And Exclusive Or (64)
515 LAY = 0xE371, // Load Address
516 LB = 0xE376, // Load Byte (32)
517 LBH = 0xE3C0, // Load Byte High (32<-8)
518 LBR = 0xB926, // Load Byte (32)
519 LCDBR = 0xB313, // Load Complement (long BFP)
520 LCDFR = 0xB373, // Load Complement (long)
521 LCEBR = 0xB303, // Load Complement (short BFP)
522 LCGFR = 0xB913, // Load Complement (64<-32)
523 LCGR = 0xB903, // Load Complement (64)
524 LCR = 0x13, // Load Complement (32)
525 LCXBR = 0xB343, // Load Complement (extended BFP)
526 LD = 0x68, // Load (long)
527 LDEB = 0xED04, // Load Lengthened (short to long BFP)
528 LDEBR = 0xB304, // Load Lengthened (short to long BFP)
529 LDETR = 0xB3D4, // Load Lengthened (short to long DFP)
530 LDGR = 0xB3C1, // Load Fpr From Gr (64 to long)
531 LDR = 0x28, // Load (long)
532 LDXBR = 0xB345, // Load Rounded (extended to long BFP)
533 LDXBRA = 0xB345, // Load Rounded (extended to long BFP)
534 LDXTR = 0xB3DD, // Load Rounded (extended to long DFP)
535 LDY = 0xED65, // Load (long)
536 LE = 0x78, // Load (short)
537 LEDBR = 0xB344, // Load Rounded (long to short BFP)
538 LEDBRA = 0xB344, // Load Rounded (long to short BFP)
539 LEDTR = 0xB3D5, // Load Rounded (long to short DFP)
540 LER = 0x38, // Load (short)
541 LEXBR = 0xB346, // Load Rounded (extended to short BFP)
542 LEXBRA = 0xB346, // Load Rounded (extended to short BFP)
543 LEY = 0xED64, // Load (short)
544 LFAS = 0xB2BD, // Load Fpc And Signal
545 LFH = 0xE3CA, // Load High (32)
546 LFHAT = 0xE3C8, // Load High And Trap (32H<-32)
547 LFPC = 0xB29D, // Load Fpc
548 LG = 0xE304, // Load (64)
549 LGAT = 0xE385, // Load And Trap (64)
550 LGB = 0xE377, // Load Byte (64)
551 LGBR = 0xB906, // Load Byte (64)
552 LGDR = 0xB3CD, // Load Gr From Fpr (long to 64)
553 LGF = 0xE314, // Load (64<-32)
554 LGFI = 0xC01, // Load Immediate (64<-32)
555 LGFR = 0xB914, // Load (64<-32)
556 LGFRL = 0xC4C, // Load Relative Long (64<-32)
557 LGH = 0xE315, // Load Halfword (64)
558 LGHI = 0xA79, // Load Halfword Immediate (64)
559 LGHR = 0xB907, // Load Halfword (64)
560 LGHRL = 0xC44, // Load Halfword Relative Long (64<-16)
561 LGR = 0xB904, // Load (64)
562 LGRL = 0xC48, // Load Relative Long (64)
563 LH = 0x48, // Load Halfword (32)
564 LHH = 0xE3C4, // Load Halfword High (32<-16)
565 LHI = 0xA78, // Load Halfword Immediate (32)
566 LHR = 0xB927, // Load Halfword (32)
567 LHRL = 0xC45, // Load Halfword Relative Long (32<-16)
568 LHY = 0xE378, // Load Halfword (32)
569 LLC = 0xE394, // Load Logical Character (32)
570 LLCH = 0xE3C2, // Load Logical Character High (32<-8)
571 LLCR = 0xB994, // Load Logical Character (32)
572 LLGC = 0xE390, // Load Logical Character (64)
573 LLGCR = 0xB984, // Load Logical Character (64)
574 LLGF = 0xE316, // Load Logical (64<-32)
575 LLGFAT = 0xE39D, // Load Logical And Trap (64<-32)
576 LLGFR = 0xB916, // Load Logical (64<-32)
577 LLGFRL = 0xC4E, // Load Logical Relative Long (64<-32)
578 LLGH = 0xE391, // Load Logical Halfword (64)
579 LLGHR = 0xB985, // Load Logical Halfword (64)
580 LLGHRL = 0xC46, // Load Logical Halfword Relative Long (64<-16)
581 LLGT = 0xE317, // Load Logical Thirty One Bits
582 LLGTAT = 0xE39C, // Load Logical Thirty One Bits And Trap (64<-31)
583 LLGTR = 0xB917, // Load Logical Thirty One Bits
584 LLH = 0xE395, // Load Logical Halfword (32)
585 LLHH = 0xE3C6, // Load Logical Halfword High (32<-16)
586 LLHR = 0xB995, // Load Logical Halfword (32)
587 LLHRL = 0xC42, // Load Logical Halfword Relative Long (32<-16)
588 LLIHF = 0xC0E, // Load Logical Immediate (high)
589 LLIHH = 0xA5C, // Load Logical Immediate (high high)
590 LLIHL = 0xA5D, // Load Logical Immediate (high low)
591 LLILF = 0xC0F, // Load Logical Immediate (low)
592 LLILH = 0xA5E, // Load Logical Immediate (low high)
593 LLILL = 0xA5F, // Load Logical Immediate (low low)
594 LM = 0x98, // Load Multiple (32)
595 LMD = 0xEF, // Load Multiple Disjoint
596 LMG = 0xEB04, // Load Multiple (64)
597 LMH = 0xEB96, // Load Multiple High
598 LMY = 0xEB98, // Load Multiple (32)
599 LNDBR = 0xB311, // Load Negative (long BFP)
600 LNDFR = 0xB371, // Load Negative (long)
601 LNEBR = 0xB301, // Load Negative (short BFP)
602 LNGFR = 0xB911, // Load Negative (64<-32)
603 LNGR = 0xB901, // Load Negative (64)
604 LNR = 0x11, // Load Negative (32)
605 LNXBR = 0xB341, // Load Negative (extended BFP)
606 LOC = 0xEBF2, // Load On Condition (32)
607 LOCG = 0xEBE2, // Load On Condition (64)
608 LOCGR = 0xB9E2, // Load On Condition (64)
609 LOCR = 0xB9F2, // Load On Condition (32)
610 LPD = 0xC84, // Load Pair Disjoint (32)
611 LPDBR = 0xB310, // Load Positive (long BFP)
612 LPDFR = 0xB370, // Load Positive (long)
613 LPDG = 0xC85, // Load Pair Disjoint (64)
614 LPEBR = 0xB300, // Load Positive (short BFP)
615 LPGFR = 0xB910, // Load Positive (64<-32)
616 LPGR = 0xB900, // Load Positive (64)
617 LPQ = 0xE38F, // Load Pair From Quadword
618 LPR = 0x10, // Load Positive (32)
619 LPXBR = 0xB340, // Load Positive (extended BFP)
620 LR = 0x18, // Load (32)
621 LRL = 0xC4D, // Load Relative Long (32)
622 LRV = 0xE31E, // Load Reversed (32)
623 LRVG = 0xE30F, // Load Reversed (64)
624 LRVGR = 0xB90F, // Load Reversed (64)
625 LRVH = 0xE31F, // Load Reversed (16)
626 LRVR = 0xB91F, // Load Reversed (32)
627 LT = 0xE312, // Load And Test (32)
628 LTDBR = 0xB312, // Load And Test (long BFP)
629 LTDTR = 0xB3D6, // Load And Test (long DFP)
630 LTEBR = 0xB302, // Load And Test (short BFP)
631 LTG = 0xE302, // Load And Test (64)
632 LTGF = 0xE332, // Load And Test (64<-32)
633 LTGFR = 0xB912, // Load And Test (64<-32)
634 LTGR = 0xB902, // Load And Test (64)
635 LTR = 0x12, // Load And Test (32)
636 LTXBR = 0xB342, // Load And Test (extended BFP)
637 LTXTR = 0xB3DE, // Load And Test (extended DFP)
638 LXDB = 0xED05, // Load Lengthened (long to extended BFP)
639 LXDBR = 0xB305, // Load Lengthened (long to extended BFP)
640 LXDTR = 0xB3DC, // Load Lengthened (long to extended DFP)
641 LXEB = 0xED06, // Load Lengthened (short to extended BFP)
642 LXEBR = 0xB306, // Load Lengthened (short to extended BFP)
643 LXR = 0xB365, // Load (extended)
644 LY = 0xE358, // Load (32)
645 LZDR = 0xB375, // Load Zero (long)
646 LZER = 0xB374, // Load Zero (short)
647 LZXR = 0xB376, // Load Zero (extended)
648 M = 0x5C, // Multiply (64<-32)
649 MADB = 0xED1E, // Multiply And Add (long BFP)
650 MADBR = 0xB31E, // Multiply And Add (long BFP)
651 MAEB = 0xED0E, // Multiply And Add (short BFP)
652 MAEBR = 0xB30E, // Multiply And Add (short BFP)
653 MC = 0xAF, // Monitor Call
654 MDB = 0xED1C, // Multiply (long BFP)
655 MDBR = 0xB31C, // Multiply (long BFP)
656 MDEB = 0xED0C, // Multiply (short to long BFP)
657 MDEBR = 0xB30C, // Multiply (short to long BFP)
658 MDTR = 0xB3D0, // Multiply (long DFP)
659 MDTRA = 0xB3D0, // Multiply (long DFP)
660 MEEB = 0xED17, // Multiply (short BFP)
661 MEEBR = 0xB317, // Multiply (short BFP)
662 MFY = 0xE35C, // Multiply (64<-32)
663 MGHI = 0xA7D, // Multiply Halfword Immediate (64)
664 MH = 0x4C, // Multiply Halfword (32)
665 MHI = 0xA7C, // Multiply Halfword Immediate (32)
666 MHY = 0xE37C, // Multiply Halfword (32)
667 ML = 0xE396, // Multiply Logical (64<-32)
668 MLG = 0xE386, // Multiply Logical (128<-64)
669 MLGR = 0xB986, // Multiply Logical (128<-64)
670 MLR = 0xB996, // Multiply Logical (64<-32)
671 MP = 0xFC, // Multiply Decimal
672 MR = 0x1C, // Multiply (64<-32)
673 MS = 0x71, // Multiply Single (32)
674 MSCH = 0xB232, // Modify Subchannel
675 MSDB = 0xED1F, // Multiply And Subtract (long BFP)
676 MSDBR = 0xB31F, // Multiply And Subtract (long BFP)
677 MSEB = 0xED0F, // Multiply And Subtract (short BFP)
678 MSEBR = 0xB30F, // Multiply And Subtract (short BFP)
679 MSFI = 0xC21, // Multiply Single Immediate (32)
680 MSG = 0xE30C, // Multiply Single (64)
681 MSGF = 0xE31C, // Multiply Single (64<-32)
682 MSGFI = 0xC20, // Multiply Single Immediate (64<-32)
683 MSGFR = 0xB91C, // Multiply Single (64<-32)
684 MSGR = 0xB90C, // Multiply Single (64)
685 MSR = 0xB252, // Multiply Single (32)
686 MSY = 0xE351, // Multiply Single (32)
687 MVC = 0xD2, // Move (character)
688 MVCP = 0xDA, // Move To Primary
689 MVCDK = 0xE50F, // Move To Primary
690 MVCIN = 0xE8, // Move Inverse
691 MVCL = 0x0E, // Move Long
692 MVCLE = 0xA8, // Move Long Extended
693 MVCLU = 0xEB8E, // Move Long Unicode
694 MVGHI = 0xE548, // Move (64<-16)
695 MVHHI = 0xE544, // Move (16<-16)
696 MVHI = 0xE54C, // Move (32<-16)
697 MVI = 0x92, // Move (immediate)
698 MVIY = 0xEB52, // Move (immediate)
699 MVN = 0xD1, // Move Numerics
700 MVO = 0xF1, // Move With Offset
701 MVST = 0xB255, // Move String
702 MVZ = 0xD3, // Move Zones
703 MXBR = 0xB34C, // Multiply (extended BFP)
704 MXDB = 0xED07, // Multiply (long to extended BFP)
705 MXDBR = 0xB307, // Multiply (long to extended BFP)
706 MXTR = 0xB3D8, // Multiply (extended DFP)
707 MXTRA = 0xB3D8, // Multiply (extended DFP)
708 N = 0x54, // And (32)
709 NC = 0xD4, // And (character)
710 NG = 0xE380, // And (64)
711 NGR = 0xB980, // And (64)
712 NGRK = 0xB9E4, // And (64)
713 NI = 0x94, // And (immediate)
714 NIAI = 0xB2FA, // Next Instruction Access Intent Ie Eh
715 NIHF = 0xC0A, // And Immediate (high)
716 NIHH = 0xA54, // And Immediate (high high)
717 NIHL = 0xA55, // And Immediate (high low)
718 NILF = 0xC0B, // And Immediate (low)
719 NILH = 0xA56, // And Immediate (low high)
720 NILL = 0xA57, // And Immediate (low low)
721 NIY = 0xEB54, // And (immediate)
722 NR = 0x14, // And (32)
723 NRK = 0xB9F4, // And (32)
724 NTSTG = 0xE325, // Nontransactional Store Rxy Tx ¤9 A Sp St B2
725 NY = 0xE354, // And (32)
726 O = 0x56, // Or (32)
727 OC = 0xD6, // Or (character)
728 OG = 0xE381, // Or (64)
729 OGR = 0xB981, // Or (64)
730 OGRK = 0xB9E6, // Or (64)
731 OI = 0x96, // Or (immediate)
732 OIHF = 0xC0C, // Or Immediate (high)
733 OIHH = 0xA58, // Or Immediate (high high)
734 OIHL = 0xA59, // Or Immediate (high low)
735 OILF = 0xC0D, // Or Immediate (low)
736 OILH = 0xA5A, // Or Immediate (low high)
737 OILL = 0xA5B, // Or Immediate (low low)
738 OIY = 0xEB56, // Or (immediate)
739 OR = 0x16, // Or (32)
740 ORK = 0xB9F6, // Or (32)
741 OY = 0xE356, // Or (32)
742 PACK = 0xF2, // Pack
743 PCC = 0xB92C, // Perform Cryptographic Computation
744 PFD = 0xE336, // Prefetch Data
745 PFDRL = 0xC62, // Prefetch Data Relative Long
746 PFPO = 0x010A, // Perform Floating-POINT Operation
747 PKA = 0xE9, // Pack Ascii
748 PKU = 0xE1, // Pack Unicode
749 PLO = 0xEE, // Perform Locked Operation
750 POPCNT_Z = 0xB9E1, // Population Count
751 PPA = 0xB2E8, // Perform Processor Assist
752 QADTR = 0xB3F5, // Quantize (long DFP)
753 QAXTR = 0xB3FD, // Quantize (extended DFP)
754 RCHP = 0xB23B, // Reset Channel Path
755 RISBG = 0xEC55, // Rotate Then Insert Selected Bits
756 RISBGN = 0xEC59, // Rotate Then Insert Selected Bits
757 RISBHG = 0xEC5D, // Rotate Then Insert Selected Bits High
758 RISBLG = 0xEC51, // Rotate Then Insert Selected Bits Low
759 RLL = 0xEB1D, // Rotate Left Single Logical (32)
760 RLLG = 0xEB1C, // Rotate Left Single Logical (64)
761 RNSBG = 0xEC54, // Rotate Then And Selected Bits
762 ROSBG = 0xEC56, // Rotate Then Or Selected Bits
763 RRDTR = 0xB3F7, // Reround (long DFP)
764 RRXTR = 0xB3FF, // Reround (extended DFP)
765 RSCH = 0xB238, // Resume Subchannel
766 RXSBG = 0xEC57, // Rotate Then Exclusive Or Selected Bits
767 S = 0x5B, // Subtract (32)
768 SAL = 0xB237, // Set Address Limit
769 SAR = 0xB24E, // Set Access
770 SCHM = 0xB23C, // Set Channel Monitor
771 SDB = 0xED1B, // Subtract (long BFP)
772 SDBR = 0xB31B, // Subtract (long BFP)
773 SDTR = 0xB3D3, // Subtract (long DFP)
774 SDTRA = 0xB3D3, // Subtract (long DFP)
775 SEB = 0xED0B, // Subtract (short BFP)
776 SEBR = 0xB30B, // Subtract (short BFP)
777 SFASR = 0xB385, // Set Fpc And Signal
778 SFPC = 0xB384, // Set Fpc
779 SG = 0xE309, // Subtract (64)
780 SGF = 0xE319, // Subtract (64<-32)
781 SGFR = 0xB919, // Subtract (64<-32)
782 SGR = 0xB909, // Subtract (64)
783 SGRK = 0xB9E9, // Subtract (64)
784 SH = 0x4B, // Subtract Halfword
785 SHHHR = 0xB9C9, // Subtract High (32)
786 SHHLR = 0xB9D9, // Subtract High (32)
787 SHY = 0xE37B, // Subtract Halfword
788 SL = 0x5F, // Subtract Logical (32)
789 SLA = 0x8B, // Shift Left Single (32)
790 SLAG = 0xEB0B, // Shift Left Single (64)
791 SLAK = 0xEBDD, // Shift Left Single (32)
792 SLB = 0xE399, // Subtract Logical With Borrow (32)
793 SLBG = 0xE389, // Subtract Logical With Borrow (64)
794 SLBGR = 0xB989, // Subtract Logical With Borrow (64)
795 SLBR = 0xB999, // Subtract Logical With Borrow (32)
796 SLDA = 0x8F, // Shift Left Double
797 SLDL = 0x8D, // Shift Left Double Logical
798 SLDT = 0xED40, // Shift Significand Left (long DFP)
799 SLFI = 0xC25, // Subtract Logical Immediate (32)
800 SLG = 0xE30B, // Subtract Logical (64)
801 SLGF = 0xE31B, // Subtract Logical (64<-32)
802 SLGFI = 0xC24, // Subtract Logical Immediate (64<-32)
803 SLGFR = 0xB91B, // Subtract Logical (64<-32)
804 SLGR = 0xB90B, // Subtract Logical (64)
805 SLGRK = 0xB9EB, // Subtract Logical (64)
806 SLHHHR = 0xB9CB, // Subtract Logical High (32)
807 SLHHLR = 0xB9DB, // Subtract Logical High (32)
808 SLL = 0x89, // Shift Left Single Logical (32)
809 SLLG = 0xEB0D, // Shift Left Single Logical (64)
810 SLLK = 0xEBDF, // Shift Left Single Logical (32)
811 SLR = 0x1F, // Subtract Logical (32)
812 SLRK = 0xB9FB, // Subtract Logical (32)
813 SLXT = 0xED48, // Shift Significand Left (extended DFP)
814 SLY = 0xE35F, // Subtract Logical (32)
815 SP = 0xFB, // Subtract Decimal
816 SPM = 0x04, // Set Program Mask
817 SQDB = 0xED15, // Square Root (long BFP)
818 SQDBR = 0xB315, // Square Root (long BFP)
819 SQEB = 0xED14, // Square Root (short BFP)
820 SQEBR = 0xB314, // Square Root (short BFP)
821 SQXBR = 0xB316, // Square Root (extended BFP)
822 SR = 0x1B, // Subtract (32)
823 SRA = 0x8A, // Shift Right Single (32)
824 SRAG = 0xEB0A, // Shift Right Single (64)
825 SRAK = 0xEBDC, // Shift Right Single (32)
826 SRDA = 0x8E, // Shift Right Double
827 SRDL = 0x8C, // Shift Right Double Logical
828 SRDT = 0xED41, // Shift Significand Right (long DFP)
829 SRK = 0xB9F9, // Subtract (32)
830 SRL = 0x88, // Shift Right Single Logical (32)
831 SRLG = 0xEB0C, // Shift Right Single Logical (64)
832 SRLK = 0xEBDE, // Shift Right Single Logical (32)
833 SRNM = 0xB299, // Set BFP Rounding Mode (2 bit)
834 SRNMB = 0xB2B8, // Set BFP Rounding Mode (3 bit)
835 SRNMT = 0xB2B9, // Set DFP Rounding Mode
836 SRP = 0xF0, // Shift And Round Decimal
837 SRST = 0xB25E, // Search String
838 SRSTU = 0xB9BE, // Search String Unicode
839 SRXT = 0xED49, // Shift Significand Right (extended DFP)
840 SSCH = 0xB233, // Start Subchannel
841 ST = 0x50, // Store (32)
842 STC = 0x42, // Store Character
843 STCH = 0xE3C3, // Store Character High (8)
844 STCK = 0xB205, // Store Clock
845 STCKE = 0xB278, // Store Clock Extended
846 STCKF = 0xB27C, // Store Clock Fast
847 STCM = 0xBE, // Store Characters Under Mask (low)
848 STCMH = 0xEB2C, // Store Characters Under Mask (high)
849 STCMY = 0xEB2D, // Store Characters Under Mask (low)
850 STCPS = 0xB23A, // Store Channel Path Status
851 STCRW = 0xB239, // Store Channel Report Word
852 STCY = 0xE372, // Store Character
853 STD = 0x60, // Store (long)
854 STDY = 0xED67, // Store (long)
855 STE = 0x70, // Store (short)
856 STEY = 0xED66, // Store (short)
857 STFH = 0xE3CB, // Store High (32)
858 STFLE = 0xB2B0, // Store Facility List Extended
859 STFPC = 0xB29C, // Store Fpc
860 STG = 0xE324, // Store (64)
861 STGRL = 0xC4B, // Store Relative Long (64)
862 STH = 0x40, // Store Halfword
863 STHH = 0xE3C7, // Store Halfword High (16)
864 STHRL = 0xC47, // Store Halfword Relative Long
865 STHY = 0xE370, // Store Halfword
866 STM = 0x90, // Store Multiple (32)
867 STMG = 0xEB24, // Store Multiple (64)
868 STMH = 0xEB26, // Store Multiple High
869 STMY = 0xEB90, // Store Multiple (32)
870 STOC = 0xEBF3, // Store On Condition (32)
871 STOCG = 0xEBE3, // Store On Condition (64)
872 STPQ = 0xE38E, // Store Pair To Quadword
873 STRL = 0xC4F, // Store Relative Long (32)
874 STRV = 0xE33E, // Store Reversed (32)
875 STRVG = 0xE32F, // Store Reversed (64)
876 STRVH = 0xE33F, // Store Reversed (16)
877 STSCH = 0xB234, // Store Subchannel
878 STY = 0xE350, // Store (32)
879 SVC = 0x0A, // Supervisor Call
880 SXBR = 0xB34B, // Subtract (extended BFP)
881 SXTR = 0xB3DB, // Subtract (extended DFP)
882 SXTRA = 0xB3DB, // Subtract (extended DFP)
883 SY = 0xE35B, // Subtract (32)
884 TABORT = 0xB2FC, // Transaction Abort
885 TBDR = 0xB351, // Convert HFP To BFP (long)
886 TBEDR = 0xB350, // Convert HFP To BFP (long to short)
887 TBEGIN = 0xE560, // Transaction Begin
888 TBEGINC = 0xE561, // Transaction Begin
889 TCDB = 0xED11, // Test Data Class (long BFP)
890 TCEB = 0xED10, // Test Data Class (short BFP)
891 TCXB = 0xED12, // Test Data Class (extended BFP)
892 TDCDT = 0xED54, // Test Data Class (long DFP)
893 TDCET = 0xED50, // Test Data Class (short DFP)
894 TDCXT = 0xED58, // Test Data Class (extended DFP)
895 TDGDT = 0xED55, // Test Data Group (long DFP)
896 TDGET = 0xED51, // Test Data Group (short DFP)
897 TDGXT = 0xED59, // Test Data Group (extended DFP)
898 TEND = 0xB2F8, // Transaction End
899 THDER = 0xB358, // Convert BFP To HFP (short to long)
900 THDR = 0xB359, // Convert BFP To HFP (long)
901 TM = 0x91, // Test Under Mask Si C A B1
902 TMH = 0xA70, // Test Under Mask High
903 TMHH = 0xA72, // Test Under Mask (high high)
904 TMHL = 0xA73, // Test Under Mask (high low)
905 TML = 0xA71, // Test Under Mask Low
906 TMLH = 0xA70, // Test Under Mask (low high)
907 TMLL = 0xA71, // Test Under Mask (low low)
908 TMY = 0xEB51, // Test Under Mask
909 TP = 0xEBC0, // Test Decimal
910 TPI = 0xB236, // Test Pending Interruption
911 TR = 0xDC, // Translate
912 TRAP4 = 0xB2FF, // Trap (4)
913 TRE = 0xB2A5, // Translate Extended
914 TROO = 0xB993, // Translate One To One
915 TROT = 0xB992, // Translate One To Two
916 TRT = 0xDD, // Translate And Test
917 TRTE = 0xB9BF, // Translate And Test Extended
918 TRTO = 0xB991, // Translate Two To One
919 TRTR = 0xD0, // Translate And Test Reverse
920 TRTRE = 0xB9BD, // Translate And Test Reverse Extended
921 TRTT = 0xB990, // Translate Two To Two
922 TS = 0x93, // Test And Set
923 TSCH = 0xB235, // Test Subchannel
924 UNPK = 0xF3, // Unpack
925 UNPKA = 0xEA, // Unpack Ascii
926 UNPKU = 0xE2, // Unpack Unicode
927 UPT = 0x0102, // Update Tree
928 X = 0x57, // Exclusive Or (32)
929 XC = 0xD7, // Exclusive Or (character)
930 XG = 0xE382, // Exclusive Or (64)
931 XGR = 0xB982, // Exclusive Or (64)
932 XGRK = 0xB9E7, // Exclusive Or (64)
933 XI = 0x97, // Exclusive Or (immediate)
934 XIHF = 0xC06, // Exclusive Or Immediate (high)
935 XILF = 0xC07, // Exclusive Or Immediate (low)
936 XIY = 0xEB57, // Exclusive Or (immediate)
937 XR = 0x17, // Exclusive Or (32)
938 XRK = 0xB9F7, // Exclusive Or (32)
939 XSCH = 0xB276, // Cancel Subchannel
940 XY = 0xE357, // Exclusive Or (32)
941 ZAP = 0xF8, // Zero And Add
942 BKPT = 0x0001, // GDB Software Breakpoint
943 DUMY = 0xE353 // Special dummy opcode 1716 DUMY = 0xE353 // Special dummy opcode
944 }; 1717 };
945 1718
946 // Instruction encoding bits and masks. 1719 // Instruction encoding bits and masks.
947 enum { 1720 enum {
948 // Instruction encoding bit 1721 // Instruction encoding bit
949 B1 = 1 << 1, 1722 B1 = 1 << 1,
950 B4 = 1 << 4, 1723 B4 = 1 << 4,
951 B5 = 1 << 5, 1724 B5 = 1 << 5,
952 B7 = 1 << 7, 1725 B7 = 1 << 7,
(...skipping 368 matching lines...) Expand 10 before | Expand all | Expand 10 after
1321 // Use the At(pc) function to create references to Instruction. 2094 // Use the At(pc) function to create references to Instruction.
1322 static Instruction* At(byte* pc) { 2095 static Instruction* At(byte* pc) {
1323 return reinterpret_cast<Instruction*>(pc); 2096 return reinterpret_cast<Instruction*>(pc);
1324 } 2097 }
1325 2098
1326 private: 2099 private:
1327 // We need to prevent the creation of instances of class Instruction. 2100 // We need to prevent the creation of instances of class Instruction.
1328 DISALLOW_IMPLICIT_CONSTRUCTORS(Instruction); 2101 DISALLOW_IMPLICIT_CONSTRUCTORS(Instruction);
1329 }; 2102 };
1330 2103
2104 #define DECLARE_FIELD_FOR_TWO_BYTE_INSTR(name, T, lo, hi) \
2105 inline int name() const { \
2106 return Bits<TwoByteInstr, T>(15 - (lo), 15 - (hi) + 1); \
2107 }
2108
2109 #define DECLARE_FIELD_FOR_FOUR_BYTE_INSTR(name, T, lo, hi) \
2110 inline int name() const { \
2111 return Bits<FourByteInstr, T>(31 - (lo), 31 - (hi) + 1); \
2112 }
2113
1331 #define DECLARE_FIELD_FOR_SIX_BYTE_INSTR(name, T, lo, hi) \ 2114 #define DECLARE_FIELD_FOR_SIX_BYTE_INSTR(name, T, lo, hi) \
1332 inline int name() const { \ 2115 inline int name() const { \
1333 return Bits<SixByteInstr, T>(47 - (lo), 47 - (hi) + 1); \ 2116 return Bits<SixByteInstr, T>(47 - (lo), 47 - (hi) + 1); \
1334 } 2117 }
1335 2118
1336 // VRR Instruction 2119 class TwoByteInstruction : public Instruction {
1337 class VRR_C_Instruction : Instruction {
1338 public: 2120 public:
1339 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(R1Value, int, 8, 12); 2121 inline int size() const { return 2; }
1340 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(R2Value, int, 12, 16); 2122 };
1341 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(R3Value, int, 16, 20); 2123
1342 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(M6Value, uint32_t, 24, 28); 2124 class FourByteInstruction : public Instruction {
1343 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(M5Value, uint32_t, 28, 32); 2125 public:
1344 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(M4Value, uint32_t, 32, 36); 2126 inline int size() const { return 4; }
2127 };
2128
2129 class SixByteInstruction : public Instruction {
2130 public:
1345 inline int size() const { return 6; } 2131 inline int size() const { return 6; }
1346 }; 2132 };
1347 2133
1348 // I Instruction -- suspect this will not be used, 2134 // I Instruction
1349 // but implement for completeness 2135 class IInstruction : public TwoByteInstruction {
1350 class IInstruction : Instruction {
1351 public: 2136 public:
1352 inline int IValue() const { return Bits<TwoByteInstr, int>(7, 0); } 2137 DECLARE_FIELD_FOR_TWO_BYTE_INSTR(IValue, int, 8, 16);
2138 };
1353 2139
1354 inline int size() const { return 2; } 2140 // E Instruction
2141 class EInstruction : public TwoByteInstruction {};
2142
2143 // IE Instruction
2144 class IEInstruction : public FourByteInstruction {
2145 public:
2146 DECLARE_FIELD_FOR_FOUR_BYTE_INSTR(I1Value, int, 24, 28);
2147 DECLARE_FIELD_FOR_FOUR_BYTE_INSTR(I2Value, int, 28, 32);
2148 };
2149
2150 // MII Instruction
2151 class MIIInstruction : public SixByteInstruction {
2152 public:
2153 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(M1Value, uint32_t, 8, 12);
2154 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(RI2Value, int, 12, 24);
2155 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(RI3Value, int, 24, 47);
2156 };
2157
2158 // RI Instruction
2159 class RIInstruction : public FourByteInstruction {
2160 public:
2161 DECLARE_FIELD_FOR_FOUR_BYTE_INSTR(R1Value, int, 8, 12);
2162 DECLARE_FIELD_FOR_FOUR_BYTE_INSTR(I2Value, int, 16, 32);
2163 DECLARE_FIELD_FOR_FOUR_BYTE_INSTR(I2UnsignedValue, uint32_t, 16, 32);
2164 DECLARE_FIELD_FOR_FOUR_BYTE_INSTR(M1Value, uint32_t, 8, 12);
1355 }; 2165 };
1356 2166
1357 // RR Instruction 2167 // RR Instruction
1358 class RRInstruction : Instruction { 2168 class RRInstruction : Instruction {
1359 public: 2169 public:
1360 inline int R1Value() const { 2170 inline int R1Value() const {
1361 // the high and low parameters of Bits is the number of bits from 2171 // the high and low parameters of Bits is the number of bits from
1362 // rightmost place 2172 // rightmost place
1363 return Bits<TwoByteInstr, int>(7, 4); 2173 return Bits<TwoByteInstr, int>(7, 4);
1364 } 2174 }
(...skipping 28 matching lines...) Expand all
1393 2203
1394 // RRD Isntruction 2204 // RRD Isntruction
1395 class RRDInstruction : Instruction { 2205 class RRDInstruction : Instruction {
1396 public: 2206 public:
1397 inline int R1Value() const { return Bits<FourByteInstr, int>(15, 12); } 2207 inline int R1Value() const { return Bits<FourByteInstr, int>(15, 12); }
1398 inline int R2Value() const { return Bits<FourByteInstr, int>(3, 0); } 2208 inline int R2Value() const { return Bits<FourByteInstr, int>(3, 0); }
1399 inline int R3Value() const { return Bits<FourByteInstr, int>(7, 4); } 2209 inline int R3Value() const { return Bits<FourByteInstr, int>(7, 4); }
1400 inline int size() const { return 4; } 2210 inline int size() const { return 4; }
1401 }; 2211 };
1402 2212
1403 // RI Instruction
1404 class RIInstruction : Instruction {
1405 public:
1406 inline int R1Value() const { return Bits<FourByteInstr, int>(23, 20); }
1407 inline int16_t I2Value() const { return Bits<FourByteInstr, int16_t>(15, 0); }
1408 inline uint16_t I2UnsignedValue() const {
1409 return Bits<FourByteInstr, uint16_t>(15, 0);
1410 }
1411 inline Condition M1Value() const {
1412 return static_cast<Condition>(Bits<FourByteInstr, int>(23, 20));
1413 }
1414 inline int size() const { return 4; }
1415 };
1416
1417 // RS Instruction 2213 // RS Instruction
1418 class RSInstruction : Instruction { 2214 class RSInstruction : Instruction {
1419 public: 2215 public:
1420 inline int R1Value() const { return Bits<FourByteInstr, int>(23, 20); } 2216 inline int R1Value() const { return Bits<FourByteInstr, int>(23, 20); }
1421 inline int R3Value() const { return Bits<FourByteInstr, int>(19, 16); } 2217 inline int R3Value() const { return Bits<FourByteInstr, int>(19, 16); }
1422 inline int B2Value() const { return Bits<FourByteInstr, int>(15, 12); } 2218 inline int B2Value() const { return Bits<FourByteInstr, int>(15, 12); }
1423 inline unsigned int D2Value() const { 2219 inline unsigned int D2Value() const {
1424 return Bits<FourByteInstr, unsigned int>(11, 0); 2220 return Bits<FourByteInstr, unsigned int>(11, 0);
1425 } 2221 }
1426 inline int size() const { return 4; } 2222 inline int size() const { return 4; }
(...skipping 113 matching lines...) Expand 10 before | Expand all | Expand 10 after
1540 inline int R2Value() const { return Bits<SixByteInstr, int>(35, 32); } 2336 inline int R2Value() const { return Bits<SixByteInstr, int>(35, 32); }
1541 inline int I3Value() const { return Bits<SixByteInstr, uint32_t>(31, 24); } 2337 inline int I3Value() const { return Bits<SixByteInstr, uint32_t>(31, 24); }
1542 inline int I4Value() const { return Bits<SixByteInstr, uint32_t>(23, 16); } 2338 inline int I4Value() const { return Bits<SixByteInstr, uint32_t>(23, 16); }
1543 inline int I5Value() const { return Bits<SixByteInstr, uint32_t>(15, 8); } 2339 inline int I5Value() const { return Bits<SixByteInstr, uint32_t>(15, 8); }
1544 inline int I6Value() const { 2340 inline int I6Value() const {
1545 return static_cast<int32_t>(Bits<SixByteInstr, int16_t>(31, 16)); 2341 return static_cast<int32_t>(Bits<SixByteInstr, int16_t>(31, 16));
1546 } 2342 }
1547 inline int size() const { return 6; } 2343 inline int size() const { return 6; }
1548 }; 2344 };
1549 2345
2346 // VRR Instruction
2347 class VRR_C_Instruction : SixByteInstruction {
2348 public:
2349 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(R1Value, int, 8, 12);
2350 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(R2Value, int, 12, 16);
2351 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(R3Value, int, 16, 20);
2352 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(M6Value, uint32_t, 24, 28);
2353 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(M5Value, uint32_t, 28, 32);
2354 DECLARE_FIELD_FOR_SIX_BYTE_INSTR(M4Value, uint32_t, 32, 36);
2355 };
2356
1550 // Helper functions for converting between register numbers and names. 2357 // Helper functions for converting between register numbers and names.
1551 class Registers { 2358 class Registers {
1552 public: 2359 public:
1553 // Lookup the register number for the name provided. 2360 // Lookup the register number for the name provided.
1554 static int Number(const char* name); 2361 static int Number(const char* name);
1555 2362
1556 private: 2363 private:
1557 static const char* names_[kNumRegisters]; 2364 static const char* names_[kNumRegisters];
1558 }; 2365 };
1559 2366
1560 // Helper functions for converting between FP register numbers and names. 2367 // Helper functions for converting between FP register numbers and names.
1561 class DoubleRegisters { 2368 class DoubleRegisters {
1562 public: 2369 public:
1563 // Lookup the register number for the name provided. 2370 // Lookup the register number for the name provided.
1564 static int Number(const char* name); 2371 static int Number(const char* name);
1565 2372
1566 private: 2373 private:
1567 static const char* names_[kNumDoubleRegisters]; 2374 static const char* names_[kNumDoubleRegisters];
1568 }; 2375 };
1569 2376
1570 } // namespace internal 2377 } // namespace internal
1571 } // namespace v8 2378 } // namespace v8
1572 2379
1573 #endif // V8_S390_CONSTANTS_S390_H_ 2380 #endif // V8_S390_CONSTANTS_S390_H_
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