OLD | NEW |
1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/base/adapters.h" | 5 #include "src/base/adapters.h" |
6 #include "src/base/bits.h" | 6 #include "src/base/bits.h" |
7 #include "src/compiler/instruction-selector-impl.h" | 7 #include "src/compiler/instruction-selector-impl.h" |
8 #include "src/compiler/node-matchers.h" | 8 #include "src/compiler/node-matchers.h" |
9 #include "src/compiler/node-properties.h" | 9 #include "src/compiler/node-properties.h" |
10 | 10 |
(...skipping 2240 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
2251 AddressingMode addressing_mode = kMode_Offset_RR; | 2251 AddressingMode addressing_mode = kMode_Offset_RR; |
2252 InstructionOperand inputs[4]; | 2252 InstructionOperand inputs[4]; |
2253 size_t input_count = 0; | 2253 size_t input_count = 0; |
2254 inputs[input_count++] = g.UseUniqueRegister(base); | 2254 inputs[input_count++] = g.UseUniqueRegister(base); |
2255 inputs[input_count++] = g.UseUniqueRegister(index); | 2255 inputs[input_count++] = g.UseUniqueRegister(index); |
2256 inputs[input_count++] = g.UseUniqueRegister(value); | 2256 inputs[input_count++] = g.UseUniqueRegister(value); |
2257 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode); | 2257 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode); |
2258 Emit(code, 0, nullptr, input_count, inputs); | 2258 Emit(code, 0, nullptr, input_count, inputs); |
2259 } | 2259 } |
2260 | 2260 |
| 2261 void InstructionSelector::VisitCreateFloat32x4(Node* node) { |
| 2262 ArmOperandGenerator g(this); |
| 2263 Emit(kArmFloat32x4Splat, g.DefineAsRegister(node), g.Use(node->InputAt(0))); |
| 2264 } |
| 2265 |
| 2266 void InstructionSelector::VisitFloat32x4ExtractLane(Node* node) { |
| 2267 ArmOperandGenerator g(this); |
| 2268 int32_t lane = OpParameter<int32_t>(node); |
| 2269 Emit(kArmFloat32x4ExtractLane, g.DefineAsRegister(node), |
| 2270 g.UseRegister(node->InputAt(0)), g.UseImmediate(lane)); |
| 2271 } |
| 2272 |
| 2273 void InstructionSelector::VisitFloat32x4ReplaceLane(Node* node) { |
| 2274 ArmOperandGenerator g(this); |
| 2275 int32_t lane = OpParameter<int32_t>(node); |
| 2276 Emit(kArmFloat32x4ReplaceLane, g.DefineAsRegister(node), |
| 2277 g.UseRegister(node->InputAt(0)), g.UseImmediate(lane), |
| 2278 g.Use(node->InputAt(1))); |
| 2279 } |
| 2280 |
| 2281 void InstructionSelector::VisitFloat32x4FromInt32x4(Node* node) { |
| 2282 ArmOperandGenerator g(this); |
| 2283 Emit(kArmFloat32x4FromInt32x4, g.DefineAsRegister(node), |
| 2284 g.UseRegister(node->InputAt(0))); |
| 2285 } |
| 2286 |
| 2287 void InstructionSelector::VisitFloat32x4FromUint32x4(Node* node) { |
| 2288 ArmOperandGenerator g(this); |
| 2289 Emit(kArmFloat32x4FromUint32x4, g.DefineAsRegister(node), |
| 2290 g.UseRegister(node->InputAt(0))); |
| 2291 } |
| 2292 |
| 2293 void InstructionSelector::VisitFloat32x4Add(Node* node) { |
| 2294 ArmOperandGenerator g(this); |
| 2295 Emit(kArmFloat32x4Add, g.DefineAsRegister(node), |
| 2296 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| 2297 } |
| 2298 |
| 2299 void InstructionSelector::VisitFloat32x4Sub(Node* node) { |
| 2300 ArmOperandGenerator g(this); |
| 2301 Emit(kArmFloat32x4Sub, g.DefineAsRegister(node), |
| 2302 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| 2303 } |
| 2304 |
| 2305 void InstructionSelector::VisitCreateInt32x4(Node* node) { |
| 2306 ArmOperandGenerator g(this); |
| 2307 Emit(kArmInt32x4Splat, g.DefineAsRegister(node), g.Use(node->InputAt(0))); |
| 2308 } |
| 2309 |
| 2310 void InstructionSelector::VisitInt32x4ExtractLane(Node* node) { |
| 2311 ArmOperandGenerator g(this); |
| 2312 int32_t lane = OpParameter<int32_t>(node); |
| 2313 Emit(kArmInt32x4ExtractLane, g.DefineAsRegister(node), |
| 2314 g.UseRegister(node->InputAt(0)), g.UseImmediate(lane)); |
| 2315 } |
| 2316 |
| 2317 void InstructionSelector::VisitInt32x4ReplaceLane(Node* node) { |
| 2318 ArmOperandGenerator g(this); |
| 2319 int32_t lane = OpParameter<int32_t>(node); |
| 2320 Emit(kArmInt32x4ReplaceLane, g.DefineAsRegister(node), |
| 2321 g.UseRegister(node->InputAt(0)), g.UseImmediate(lane), |
| 2322 g.Use(node->InputAt(1))); |
| 2323 } |
| 2324 |
| 2325 void InstructionSelector::VisitInt32x4FromFloat32x4(Node* node) { |
| 2326 ArmOperandGenerator g(this); |
| 2327 Emit(kArmInt32x4FromFloat32x4, g.DefineAsRegister(node), |
| 2328 g.UseRegister(node->InputAt(0))); |
| 2329 } |
| 2330 |
| 2331 void InstructionSelector::VisitUint32x4FromFloat32x4(Node* node) { |
| 2332 ArmOperandGenerator g(this); |
| 2333 Emit(kArmUint32x4FromFloat32x4, g.DefineAsRegister(node), |
| 2334 g.UseRegister(node->InputAt(0))); |
| 2335 } |
| 2336 |
| 2337 void InstructionSelector::VisitInt32x4Add(Node* node) { |
| 2338 ArmOperandGenerator g(this); |
| 2339 Emit(kArmInt32x4Add, g.DefineAsRegister(node), |
| 2340 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| 2341 } |
| 2342 |
| 2343 void InstructionSelector::VisitInt32x4Sub(Node* node) { |
| 2344 ArmOperandGenerator g(this); |
| 2345 Emit(kArmInt32x4Sub, g.DefineAsRegister(node), |
| 2346 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| 2347 } |
| 2348 |
| 2349 void InstructionSelector::VisitInt32x4Equal(Node* node) { |
| 2350 ArmOperandGenerator g(this); |
| 2351 Emit(kArmInt32x4Eq, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| 2352 g.UseRegister(node->InputAt(1))); |
| 2353 } |
| 2354 |
| 2355 void InstructionSelector::VisitInt32x4NotEqual(Node* node) { |
| 2356 ArmOperandGenerator g(this); |
| 2357 Emit(kArmInt32x4Ne, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| 2358 g.UseRegister(node->InputAt(1))); |
| 2359 } |
| 2360 |
| 2361 void InstructionSelector::VisitSimd32x4Select(Node* node) { |
| 2362 ArmOperandGenerator g(this); |
| 2363 Emit(kArmSimd32x4Select, g.DefineAsRegister(node), |
| 2364 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)), |
| 2365 g.UseRegister(node->InputAt(2))); |
| 2366 } |
| 2367 |
2261 // static | 2368 // static |
2262 MachineOperatorBuilder::Flags | 2369 MachineOperatorBuilder::Flags |
2263 InstructionSelector::SupportedMachineOperatorFlags() { | 2370 InstructionSelector::SupportedMachineOperatorFlags() { |
2264 MachineOperatorBuilder::Flags flags; | 2371 MachineOperatorBuilder::Flags flags; |
2265 if (CpuFeatures::IsSupported(SUDIV)) { | 2372 if (CpuFeatures::IsSupported(SUDIV)) { |
2266 // The sdiv and udiv instructions correctly return 0 if the divisor is 0, | 2373 // The sdiv and udiv instructions correctly return 0 if the divisor is 0, |
2267 // but the fall-back implementation does not. | 2374 // but the fall-back implementation does not. |
2268 flags |= MachineOperatorBuilder::kInt32DivIsSafe | | 2375 flags |= MachineOperatorBuilder::kInt32DivIsSafe | |
2269 MachineOperatorBuilder::kUint32DivIsSafe; | 2376 MachineOperatorBuilder::kUint32DivIsSafe; |
2270 } | 2377 } |
(...skipping 20 matching lines...) Expand all Loading... |
2291 Vector<MachineType> req_aligned = Vector<MachineType>::New(2); | 2398 Vector<MachineType> req_aligned = Vector<MachineType>::New(2); |
2292 req_aligned[0] = MachineType::Float32(); | 2399 req_aligned[0] = MachineType::Float32(); |
2293 req_aligned[1] = MachineType::Float64(); | 2400 req_aligned[1] = MachineType::Float64(); |
2294 return MachineOperatorBuilder::AlignmentRequirements:: | 2401 return MachineOperatorBuilder::AlignmentRequirements:: |
2295 SomeUnalignedAccessUnsupported(req_aligned, req_aligned); | 2402 SomeUnalignedAccessUnsupported(req_aligned, req_aligned); |
2296 } | 2403 } |
2297 | 2404 |
2298 } // namespace compiler | 2405 } // namespace compiler |
2299 } // namespace internal | 2406 } // namespace internal |
2300 } // namespace v8 | 2407 } // namespace v8 |
OLD | NEW |