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| 1 // Copyright 2015 the V8 project authors. All rights reserved. | 1 // Copyright 2015 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "src/compiler/instruction-scheduler.h" | 5 #include "src/compiler/instruction-scheduler.h" |
| 6 | 6 |
| 7 namespace v8 { | 7 namespace v8 { |
| 8 namespace internal { | 8 namespace internal { |
| 9 namespace compiler { | 9 namespace compiler { |
| 10 | 10 |
| (...skipping 90 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 101 case kArmVmovLowF64U32: | 101 case kArmVmovLowF64U32: |
| 102 case kArmVmovHighU32F64: | 102 case kArmVmovHighU32F64: |
| 103 case kArmVmovHighF64U32: | 103 case kArmVmovHighF64U32: |
| 104 case kArmVmovF64U32U32: | 104 case kArmVmovF64U32U32: |
| 105 case kArmVmovU32U32F64: | 105 case kArmVmovU32U32F64: |
| 106 case kArmFloat32Max: | 106 case kArmFloat32Max: |
| 107 case kArmFloat64Max: | 107 case kArmFloat64Max: |
| 108 case kArmFloat32Min: | 108 case kArmFloat32Min: |
| 109 case kArmFloat64Min: | 109 case kArmFloat64Min: |
| 110 case kArmFloat64SilenceNaN: | 110 case kArmFloat64SilenceNaN: |
| 111 case kArmFloat32x4Splat: |
| 112 case kArmFloat32x4ExtractLane: |
| 113 case kArmFloat32x4ReplaceLane: |
| 114 case kArmFloat32x4FromInt32x4: |
| 115 case kArmFloat32x4FromUint32x4: |
| 116 case kArmFloat32x4Add: |
| 117 case kArmFloat32x4Sub: |
| 118 case kArmInt32x4Splat: |
| 119 case kArmInt32x4ExtractLane: |
| 120 case kArmInt32x4ReplaceLane: |
| 121 case kArmInt32x4FromFloat32x4: |
| 122 case kArmUint32x4FromFloat32x4: |
| 123 case kArmInt32x4Add: |
| 124 case kArmInt32x4Sub: |
| 125 case kArmInt32x4Eq: |
| 126 case kArmInt32x4Ne: |
| 127 case kArmSimd32x4Select: |
| 111 return kNoOpcodeFlags; | 128 return kNoOpcodeFlags; |
| 112 | 129 |
| 113 case kArmVldrF32: | 130 case kArmVldrF32: |
| 114 case kArmVldrF64: | 131 case kArmVldrF64: |
| 115 case kArmLdrb: | 132 case kArmLdrb: |
| 116 case kArmLdrsb: | 133 case kArmLdrsb: |
| 117 case kArmLdrh: | 134 case kArmLdrh: |
| 118 case kArmLdrsh: | 135 case kArmLdrsh: |
| 119 case kArmLdr: | 136 case kArmLdr: |
| 120 return kIsLoadOperation; | 137 return kIsLoadOperation; |
| (...skipping 20 matching lines...) Expand all Loading... |
| 141 | 158 |
| 142 | 159 |
| 143 int InstructionScheduler::GetInstructionLatency(const Instruction* instr) { | 160 int InstructionScheduler::GetInstructionLatency(const Instruction* instr) { |
| 144 // TODO(all): Add instruction cost modeling. | 161 // TODO(all): Add instruction cost modeling. |
| 145 return 1; | 162 return 1; |
| 146 } | 163 } |
| 147 | 164 |
| 148 } // namespace compiler | 165 } // namespace compiler |
| 149 } // namespace internal | 166 } // namespace internal |
| 150 } // namespace v8 | 167 } // namespace v8 |
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Chromium Code Reviews
Issue 2584863002:
[Turbofan] Add native ARM support for basic SIMD 32x4 operations. (Closed)
