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Issue 2584863002: [Turbofan] Add native ARM support for basic SIMD 32x4 operations. (Closed)
Patch Set: Fix Arm compile. Created 4 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/arm/macro-assembler-arm.h" 7 #include "src/arm/macro-assembler-arm.h"
8 #include "src/compilation-info.h" 8 #include "src/compilation-info.h"
9 #include "src/compiler/code-generator-impl.h" 9 #include "src/compiler/code-generator-impl.h"
10 #include "src/compiler/gap-resolver.h" 10 #include "src/compiler/gap-resolver.h"
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1498 frame_access_state()->IncreaseSPDelta(1); 1498 frame_access_state()->IncreaseSPDelta(1);
1499 } 1499 }
1500 DCHECK_EQ(LeaveCC, i.OutputSBit()); 1500 DCHECK_EQ(LeaveCC, i.OutputSBit());
1501 break; 1501 break;
1502 case kArmPoke: { 1502 case kArmPoke: {
1503 int const slot = MiscField::decode(instr->opcode()); 1503 int const slot = MiscField::decode(instr->opcode());
1504 __ str(i.InputRegister(0), MemOperand(sp, slot * kPointerSize)); 1504 __ str(i.InputRegister(0), MemOperand(sp, slot * kPointerSize));
1505 DCHECK_EQ(LeaveCC, i.OutputSBit()); 1505 DCHECK_EQ(LeaveCC, i.OutputSBit());
1506 break; 1506 break;
1507 } 1507 }
1508 case kArmFloat32x4Splat: {
1509 __ vdup(i.OutputSimd128Register(), i.InputFloatRegister(0));
1510 break;
1511 }
1512 case kArmFloat32x4ExtractLane: {
1513 __ ExtractLane(i.OutputFloatRegister(), i.InputSimd128Register(0),
1514 kScratchReg, i.InputInt8(1));
1515 break;
1516 }
1517 case kArmFloat32x4ReplaceLane: {
1518 __ ReplaceLane(i.OutputSimd128Register(), i.InputSimd128Register(0),
1519 i.InputFloatRegister(2), kScratchReg, i.InputInt8(1));
1520 break;
1521 }
1522 case kArmFloat32x4FromInt32x4: {
1523 __ vcvt_f32_s32(i.OutputSimd128Register(), i.InputSimd128Register(0));
1524 break;
1525 }
1526 case kArmFloat32x4FromUint32x4: {
1527 __ vcvt_f32_u32(i.OutputSimd128Register(), i.InputSimd128Register(0));
1528 break;
1529 }
1530 case kArmFloat32x4Add: {
1531 __ vadd(i.OutputSimd128Register(), i.InputSimd128Register(0),
1532 i.InputSimd128Register(1));
1533 break;
1534 }
1535 case kArmFloat32x4Sub: {
1536 __ vsub(i.OutputSimd128Register(), i.InputSimd128Register(0),
1537 i.InputSimd128Register(1));
1538 break;
1539 }
1540 case kArmInt32x4Splat: {
1541 __ vdup(Neon32, i.OutputSimd128Register(), i.InputRegister(0));
1542 break;
1543 }
1544 case kArmInt32x4ExtractLane: {
1545 __ ExtractLane(i.OutputRegister(), i.InputSimd128Register(0), NeonS32,
1546 i.InputInt8(1));
1547 break;
1548 }
1549 case kArmInt32x4ReplaceLane: {
1550 __ ReplaceLane(i.OutputSimd128Register(), i.InputSimd128Register(0),
1551 i.InputRegister(2), NeonS32, i.InputInt8(1));
1552 break;
1553 }
1554 case kArmInt32x4FromFloat32x4: {
1555 __ vcvt_s32_f32(i.OutputSimd128Register(), i.InputSimd128Register(0));
1556 break;
1557 }
1558 case kArmUint32x4FromFloat32x4: {
1559 __ vcvt_u32_f32(i.OutputSimd128Register(), i.InputSimd128Register(0));
1560 break;
1561 }
1562 case kArmInt32x4Add: {
1563 __ vadd(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1564 i.InputSimd128Register(1));
1565 break;
1566 }
1567 case kArmInt32x4Sub: {
1568 __ vsub(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1569 i.InputSimd128Register(1));
1570 break;
1571 }
1572 case kArmInt32x4Eq: {
1573 __ vceq(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1574 i.InputSimd128Register(1));
1575 break;
1576 }
1577 case kArmInt32x4Ne: {
1578 Simd128Register dst = i.OutputSimd128Register();
1579 __ vceq(Neon32, dst, i.InputSimd128Register(0),
1580 i.InputSimd128Register(1));
1581 __ vmvn(dst, dst);
1582 break;
1583 }
1584 case kArmSimd32x4Select: {
1585 // Select is a ternary op, so we need to move one input into the
1586 // destination. Use vtst to canonicalize the 'boolean' input #0.
1587 __ vtst(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1588 i.InputSimd128Register(0));
1589 __ vbsl(i.OutputSimd128Register(), i.InputSimd128Register(1),
1590 i.InputSimd128Register(2));
1591 break;
1592 }
1508 case kCheckedLoadInt8: 1593 case kCheckedLoadInt8:
1509 ASSEMBLE_CHECKED_LOAD_INTEGER(ldrsb); 1594 ASSEMBLE_CHECKED_LOAD_INTEGER(ldrsb);
1510 break; 1595 break;
1511 case kCheckedLoadUint8: 1596 case kCheckedLoadUint8:
1512 ASSEMBLE_CHECKED_LOAD_INTEGER(ldrb); 1597 ASSEMBLE_CHECKED_LOAD_INTEGER(ldrb);
1513 break; 1598 break;
1514 case kCheckedLoadInt16: 1599 case kCheckedLoadInt16:
1515 ASSEMBLE_CHECKED_LOAD_INTEGER(ldrsh); 1600 ASSEMBLE_CHECKED_LOAD_INTEGER(ldrsh);
1516 break; 1601 break;
1517 case kCheckedLoadUint16: 1602 case kCheckedLoadUint16:
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2165 padding_size -= v8::internal::Assembler::kInstrSize; 2250 padding_size -= v8::internal::Assembler::kInstrSize;
2166 } 2251 }
2167 } 2252 }
2168 } 2253 }
2169 2254
2170 #undef __ 2255 #undef __
2171 2256
2172 } // namespace compiler 2257 } // namespace compiler
2173 } // namespace internal 2258 } // namespace internal
2174 } // namespace v8 2259 } // namespace v8
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