s390x: implement vector support on s390

src/s390/simulator-s390.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <stdarg.h>
 #include <stdlib.h>
 #include <cmath>
 
 #if V8_TARGET_ARCH_S390
 
@@ skipping 725 matching lines @@
   base::CallOnce(&once, &Simulator::EvalTableInit);
 }
 
 Simulator::EvaluateFuncType Simulator::EvalTable[] = {NULL};
 
 void Simulator::EvalTableInit() {
   for (int i = 0; i < MAX_NUM_OPCODES; i++) {
     EvalTable[i] = &Simulator::Evaluate_Unknown;
   }
 
+#define CREATE_EVALUATE_TABLE(name, op_name, op_value) \
+  EvalTable[op_name] = &Simulator::Evaluate_##op_name;
+  VRR_C_OPCODE_LIST(CREATE_EVALUATE_TABLE);
+#undef CREATE_EVALUATE_TABLE
+
   EvalTable[DUMY] = &Simulator::Evaluate_DUMY;
   EvalTable[BKPT] = &Simulator::Evaluate_BKPT;
   EvalTable[SPM] = &Simulator::Evaluate_SPM;
   EvalTable[BALR] = &Simulator::Evaluate_BALR;
   EvalTable[BCTR] = &Simulator::Evaluate_BCTR;
   EvalTable[BCR] = &Simulator::Evaluate_BCR;
   EvalTable[SVC] = &Simulator::Evaluate_SVC;
   EvalTable[BSM] = &Simulator::Evaluate_BSM;
   EvalTable[BASSM] = &Simulator::Evaluate_BASSM;
   EvalTable[BASR] = &Simulator::Evaluate_BASR;
@@ skipping 5287 matching lines @@
   int16_t i2 = AS(RIInstruction)->I2Value();                           \
   int length = 4;
 
 #define DECODE_RXE_INSTRUCTION(r1, b2, x2, d2) \
   int r1 = AS(RXEInstruction)->R1Value();      \
   int b2 = AS(RXEInstruction)->B2Value();      \
   int x2 = AS(RXEInstruction)->X2Value();      \
   int d2 = AS(RXEInstruction)->D2Value();      \
   int length = 6;
 
+#define DECODE_VRR_C_INSTRUCTION(r1, r2, r3, m6, m5, m4) \
+  int r1 = AS(VRR_C_Instruction)->R1Value();             \
+  int r2 = AS(VRR_C_Instruction)->R2Value();             \
+  int r3 = AS(VRR_C_Instruction)->R3Value();             \
+  int m6 = AS(VRR_C_Instruction)->M6Value();             \
+  int m5 = AS(VRR_C_Instruction)->M5Value();             \
+  int m4 = AS(VRR_C_Instruction)->M4Value();             \
+  int length = 6;
+
 #define GET_ADDRESS(index_reg, base_reg, offset)       \
   (((index_reg) == 0) ? 0 : get_register(index_reg)) + \
       (((base_reg) == 0) ? 0 : get_register(base_reg)) + offset
 
 int Simulator::Evaluate_Unknown(Instruction* instr) {
   UNREACHABLE();
   return 0;
 }
 
+EVALUATE(VFA) {
+  DCHECK_OPCODE(VFA);
+  DECODE_VRR_C_INSTRUCTION(r1, r2, r3, m6, m5, m4);
+  USE(m6);
+  USE(m5);
+  USE(m4);
+  DCHECK(m5 == 8);
+  DCHECK(m4 == 3);
+  double r2_val = get_double_from_d_register(r2);
+  double r3_val = get_double_from_d_register(r3);
+  double r1_val = r2_val + r3_val;
+  set_d_register_from_double(r1, r1_val);
+  return length;
+}
+
+EVALUATE(VFS) {
+  DCHECK_OPCODE(VFS);
+  DECODE_VRR_C_INSTRUCTION(r1, r2, r3, m6, m5, m4);
+  USE(m6);
+  USE(m5);
+  USE(m4);
+  DCHECK(m5 == 8);
+  DCHECK(m4 == 3);
+  double r2_val = get_double_from_d_register(r2);
+  double r3_val = get_double_from_d_register(r3);
+  double r1_val = r2_val - r3_val;
+  set_d_register_from_double(r1, r1_val);
+  return length;
+}
+
+EVALUATE(VFM) {
+  DCHECK_OPCODE(VFM);
+  DECODE_VRR_C_INSTRUCTION(r1, r2, r3, m6, m5, m4);
+  USE(m6);
+  USE(m5);
+  USE(m4);
+  DCHECK(m5 == 8);
+  DCHECK(m4 == 3);
+  double r2_val = get_double_from_d_register(r2);
+  double r3_val = get_double_from_d_register(r3);
+  double r1_val = r2_val * r3_val;
+  set_d_register_from_double(r1, r1_val);
+  return length;
+}
+
+EVALUATE(VFD) {
+  DCHECK_OPCODE(VFD);
+  DECODE_VRR_C_INSTRUCTION(r1, r2, r3, m6, m5, m4);
+  USE(m6);
+  USE(m5);
+  USE(m4);
+  DCHECK(m5 == 8);
+  DCHECK(m4 == 3);
+  double r2_val = get_double_from_d_register(r2);
+  double r3_val = get_double_from_d_register(r3);
+  double r1_val = r2_val / r3_val;
+  set_d_register_from_double(r1, r1_val);
+  return length;
+}
+
 EVALUATE(DUMY) {
   DCHECK_OPCODE(DUMY);
+  DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2);
+  USE(r1);
+  USE(x2);
+  USE(b2);
+  USE(d2);
   // dummy instruction does nothing.
-  return 6;
+  return length;
 }
 
 EVALUATE(CLR) {
   DCHECK_OPCODE(CLR);
   DECODE_RR_INSTRUCTION(r1, r2);
   uint32_t r1_val = get_low_register<uint32_t>(r1);
   uint32_t r2_val = get_low_register<uint32_t>(r2);
   SetS390ConditionCode<uint32_t>(r1_val, r2_val);
   return length;
 }
@@ skipping 6568 matching lines @@
   return 0;
 }
 
 #undef EVALUATE
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // USE_SIMULATOR
 #endif  // V8_TARGET_ARCH_S390