ARM Skia NEON patches - 36 - Color32

ARM Skia NEON patches - 36 - Color32

Convert Color32 to intrinsics

This change is performance-neutral for high values of count and is
a big improvement for values smaller than 64.

Signed-off-by: Kévin PETIT <kevin.petit@arm.com>;

BUG=skia:

Committed: http://code.google.com/p/skia/source/detail?r=14435

[kevin.petit, 2014-04-29 13:18:48]

This one has no mismatches.

[mtklein, 2014-04-29 13:50:29]

Thanks!  I'm always happy when we can replace inline asm with intrinsics.

https://codereview.chromium.org/258173005/diff/1/src/opts/SkBlitRow_opts_arm_...
File src/opts/SkBlitRow_opts_arm_neon.cpp (left):

https://codereview.chromium.org/258173005/diff/1/src/opts/SkBlitRow_opts_arm_...
src/opts/SkBlitRow_opts_arm_neon.cpp:1395: PLD128(src, 0)
Was it that these preloads that were detrimental to small-N performance, and are
predicted well anyway for large N?

https://codereview.chromium.org/258173005/diff/1/src/opts/SkBlitRow_opts_arm_...
File src/opts/SkBlitRow_opts_arm_neon.cpp (right):

https://codereview.chromium.org/258173005/diff/1/src/opts/SkBlitRow_opts_arm_...
src/opts/SkBlitRow_opts_arm_neon.cpp:1403: uint16x8x4_t vtmp;
Can you move the declarations of vtmp, vres, and vdst down to just before
they're written into (just under the comments)?  It'd help me follow the
bouncing between 64 and 128 bit registers a bit to see the types right there.

[kevin.petit, 2014-04-29 14:08:56]

https://codereview.chromium.org/258173005/diff/1/src/opts/SkBlitRow_opts_arm_...
File src/opts/SkBlitRow_opts_arm_neon.cpp (left):

https://codereview.chromium.org/258173005/diff/1/src/opts/SkBlitRow_opts_arm_...
src/opts/SkBlitRow_opts_arm_neon.cpp:1395: PLD128(src, 0)
On 2014/04/29 13:50:30, mtklein wrote:
> Was it that these preloads that were detrimental to small-N performance, and
are
> predicted well anyway for large N?

Nope, these preloads are disabled in all builds as far as I can tell. My next
proposed patch removes all that useless logic (Color32 was the only potential
"user").

Usually, the more asm you have and the less the compiler is able to re-order
code (even surrounding code). I would say the perf improvement comes from
reducing the amount of asm and handling count in a slightly saner way but I
haven't done any detailed analysis to back that.

https://codereview.chromium.org/258173005/diff/1/src/opts/SkBlitRow_opts_arm_...
File src/opts/SkBlitRow_opts_arm_neon.cpp (right):

https://codereview.chromium.org/258173005/diff/1/src/opts/SkBlitRow_opts_arm_...
src/opts/SkBlitRow_opts_arm_neon.cpp:1403: uint16x8x4_t vtmp;
On 2014/04/29 13:50:30, mtklein wrote:
> Can you move the declarations of vtmp, vres, and vdst down to just before
> they're written into (just under the comments)?  It'd help me follow the
> bouncing between 64 and 128 bit registers a bit to see the types right there.

Done.

[mtklein, 2014-04-29 14:14:01]

Gotcha.  LGTM

[kevin.petit, 2014-04-29 14:18:10]

The CQ bit was checked by kevin.petit@arm.com

[commit-bot: I haz the power, 2014-04-29 14:18:22]

CQ is trying da patch. Follow status at
https://skia-tree-status.appspot.com/cq/kevin.petit@arm.com/258173005/20001

[borenet, 2014-04-29 15:29:00]

The CQ bit was unchecked by borenet@google.com

[borenet, 2014-04-29 15:29:08]

The CQ bit was checked by borenet@google.com

[commit-bot: I haz the power, 2014-04-29 15:29:28]

CQ is trying da patch. Follow status at
https://skia-tree-status.appspot.com/cq/kevin.petit@arm.com/258173005/20001

[commit-bot: I haz the power, 2014-04-29 15:36:38]

Change committed as 14435