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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "src/base/adapters.h" | 5 #include "src/base/adapters.h" |
| 6 #include "src/compiler/instruction-selector-impl.h" | 6 #include "src/compiler/instruction-selector-impl.h" |
| 7 #include "src/compiler/node-matchers.h" | 7 #include "src/compiler/node-matchers.h" |
| 8 #include "src/compiler/node-properties.h" | 8 #include "src/compiler/node-properties.h" |
| 9 | 9 |
| 10 namespace v8 { | 10 namespace v8 { |
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| 388 case MachineRepresentation::kBit: // Fall through. | 388 case MachineRepresentation::kBit: // Fall through. |
| 389 case MachineRepresentation::kTaggedSigned: // Fall through. | 389 case MachineRepresentation::kTaggedSigned: // Fall through. |
| 390 case MachineRepresentation::kTaggedPointer: // Fall through. | 390 case MachineRepresentation::kTaggedPointer: // Fall through. |
| 391 case MachineRepresentation::kTagged: // Fall through. | 391 case MachineRepresentation::kTagged: // Fall through. |
| 392 case MachineRepresentation::kWord64: // Fall through. | 392 case MachineRepresentation::kWord64: // Fall through. |
| 393 case MachineRepresentation::kSimd128: // Fall through. | 393 case MachineRepresentation::kSimd128: // Fall through. |
| 394 case MachineRepresentation::kNone: | 394 case MachineRepresentation::kNone: |
| 395 UNREACHABLE(); | 395 UNREACHABLE(); |
| 396 return; | 396 return; |
| 397 } | 397 } |
| 398 Int32Matcher mbuffer(buffer); | 398 InstructionOperand offset_operand = g.UseRegister(offset); |
| 399 InstructionOperand buffer_operand = | |
| 400 mbuffer.HasValue() ? g.UseImmediate(buffer) : g.UseRegister(buffer); | |
| 401 if (offset->opcode() == IrOpcode::kInt32Add && CanCover(node, offset)) { | |
| 402 Int32Matcher mlength(length); | |
| 403 Int32BinopMatcher moffset(offset); | |
| 404 if (mlength.HasValue() && moffset.right().HasValue() && | |
| 405 moffset.right().Value() > 0 && | |
| 406 mlength.Value() >= moffset.right().Value()) { | |
| 407 Emit(opcode, g.DefineAsRegister(node), buffer_operand, | |
| 408 g.UseRegister(moffset.left().node()), | |
| 409 g.UseImmediate(moffset.right().node()), g.UseImmediate(length)); | |
| 410 return; | |
| 411 } | |
| 412 } | |
| 413 InstructionOperand length_operand = | 399 InstructionOperand length_operand = |
| 414 g.CanBeImmediate(length) ? g.UseImmediate(length) : g.UseRegister(length); | 400 g.CanBeImmediate(length) ? g.UseImmediate(length) : g.UseRegister(length); |
| 415 Emit(opcode, g.DefineAsRegister(node), buffer_operand, g.UseRegister(offset), | 401 if (g.CanBeImmediate(buffer)) { |
| 416 g.TempImmediate(0), length_operand); | 402 Emit(opcode | AddressingModeField::encode(kMode_MRI), |
| 403 g.DefineAsRegister(node), offset_operand, length_operand, |
| 404 offset_operand, g.UseImmediate(buffer)); |
| 405 } else { |
| 406 Emit(opcode | AddressingModeField::encode(kMode_MR1), |
| 407 g.DefineAsRegister(node), offset_operand, length_operand, |
| 408 g.UseRegister(buffer), offset_operand); |
| 409 } |
| 417 } | 410 } |
| 418 | 411 |
| 419 | 412 |
| 420 void InstructionSelector::VisitCheckedStore(Node* node) { | 413 void InstructionSelector::VisitCheckedStore(Node* node) { |
| 421 MachineRepresentation rep = CheckedStoreRepresentationOf(node->op()); | 414 MachineRepresentation rep = CheckedStoreRepresentationOf(node->op()); |
| 422 IA32OperandGenerator g(this); | 415 IA32OperandGenerator g(this); |
| 423 Node* const buffer = node->InputAt(0); | 416 Node* const buffer = node->InputAt(0); |
| 424 Node* const offset = node->InputAt(1); | 417 Node* const offset = node->InputAt(1); |
| 425 Node* const length = node->InputAt(2); | 418 Node* const length = node->InputAt(2); |
| 426 Node* const value = node->InputAt(3); | 419 Node* const value = node->InputAt(3); |
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| 450 case MachineRepresentation::kNone: | 443 case MachineRepresentation::kNone: |
| 451 UNREACHABLE(); | 444 UNREACHABLE(); |
| 452 return; | 445 return; |
| 453 } | 446 } |
| 454 InstructionOperand value_operand = | 447 InstructionOperand value_operand = |
| 455 g.CanBeImmediate(value) ? g.UseImmediate(value) | 448 g.CanBeImmediate(value) ? g.UseImmediate(value) |
| 456 : ((rep == MachineRepresentation::kWord8 || | 449 : ((rep == MachineRepresentation::kWord8 || |
| 457 rep == MachineRepresentation::kBit) | 450 rep == MachineRepresentation::kBit) |
| 458 ? g.UseByteRegister(value) | 451 ? g.UseByteRegister(value) |
| 459 : g.UseRegister(value)); | 452 : g.UseRegister(value)); |
| 460 Int32Matcher mbuffer(buffer); | 453 InstructionOperand offset_operand = g.UseRegister(offset); |
| 461 InstructionOperand buffer_operand = | |
| 462 mbuffer.HasValue() ? g.UseImmediate(buffer) : g.UseRegister(buffer); | |
| 463 if (offset->opcode() == IrOpcode::kInt32Add && CanCover(node, offset)) { | |
| 464 Int32Matcher mlength(length); | |
| 465 Int32BinopMatcher moffset(offset); | |
| 466 if (mlength.HasValue() && moffset.right().HasValue() && | |
| 467 moffset.right().Value() > 0 && | |
| 468 mlength.Value() >= moffset.right().Value()) { | |
| 469 Emit(opcode, g.NoOutput(), buffer_operand, | |
| 470 g.UseRegister(moffset.left().node()), | |
| 471 g.UseImmediate(moffset.right().node()), g.UseImmediate(length), | |
| 472 value_operand); | |
| 473 return; | |
| 474 } | |
| 475 } | |
| 476 InstructionOperand length_operand = | 454 InstructionOperand length_operand = |
| 477 g.CanBeImmediate(length) ? g.UseImmediate(length) : g.UseRegister(length); | 455 g.CanBeImmediate(length) ? g.UseImmediate(length) : g.UseRegister(length); |
| 478 Emit(opcode, g.NoOutput(), buffer_operand, g.UseRegister(offset), | 456 if (g.CanBeImmediate(buffer)) { |
| 479 g.TempImmediate(0), length_operand, value_operand); | 457 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(), |
| 458 offset_operand, length_operand, value_operand, offset_operand, |
| 459 g.UseImmediate(buffer)); |
| 460 } else { |
| 461 Emit(opcode | AddressingModeField::encode(kMode_MR1), g.NoOutput(), |
| 462 offset_operand, length_operand, value_operand, g.UseRegister(buffer), |
| 463 offset_operand); |
| 464 } |
| 480 } | 465 } |
| 481 | 466 |
| 482 namespace { | 467 namespace { |
| 483 | 468 |
| 484 // Shared routine for multiple binary operations. | 469 // Shared routine for multiple binary operations. |
| 485 void VisitBinop(InstructionSelector* selector, Node* node, | 470 void VisitBinop(InstructionSelector* selector, Node* node, |
| 486 InstructionCode opcode, FlagsContinuation* cont) { | 471 InstructionCode opcode, FlagsContinuation* cont) { |
| 487 IA32OperandGenerator g(selector); | 472 IA32OperandGenerator g(selector); |
| 488 Int32BinopMatcher m(node); | 473 Int32BinopMatcher m(node); |
| 489 Node* left = m.left().node(); | 474 Node* left = m.left().node(); |
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| 1762 // static | 1747 // static |
| 1763 MachineOperatorBuilder::AlignmentRequirements | 1748 MachineOperatorBuilder::AlignmentRequirements |
| 1764 InstructionSelector::AlignmentRequirements() { | 1749 InstructionSelector::AlignmentRequirements() { |
| 1765 return MachineOperatorBuilder::AlignmentRequirements:: | 1750 return MachineOperatorBuilder::AlignmentRequirements:: |
| 1766 FullUnalignedAccessSupport(); | 1751 FullUnalignedAccessSupport(); |
| 1767 } | 1752 } |
| 1768 | 1753 |
| 1769 } // namespace compiler | 1754 } // namespace compiler |
| 1770 } // namespace internal | 1755 } // namespace internal |
| 1771 } // namespace v8 | 1756 } // namespace v8 |
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