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Unified Diff: test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc

Issue 2569683002: MIPS[64]: Disable fusion multiple-accumulate instructions (Closed)
Patch Set: Created 4 years ago
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Index: test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc
diff --git a/test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc b/test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc
index 228fa528b014c6543309290de6615c3e4cbbe175..e9b84b1238379ce2d4113382f4d65b3083ce1580 100644
--- a/test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc
+++ b/test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc
@@ -1752,6 +1752,9 @@ TEST_F(InstructionSelectorTest, Float64Abs) {
}
TEST_F(InstructionSelectorTest, Float32AddWithFloat32Mul) {
+ if (kArchVariant != kMips64r2) {
+ return;
+ }
{
StreamBuilder m(this, MachineType::Float32(), MachineType::Float32(),
MachineType::Float32(), MachineType::Float32());
@@ -1762,23 +1765,14 @@ TEST_F(InstructionSelectorTest, Float32AddWithFloat32Mul) {
m.Return(n);
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
- if (kArchVariant == kMips64r2) {
- EXPECT_EQ(kMips64MaddS, s[0]->arch_opcode());
- } else if (kArchVariant == kMips64r6) {
- EXPECT_EQ(kMips64MaddfS, s[0]->arch_opcode());
- }
+ EXPECT_EQ(kMips64MaddS, s[0]->arch_opcode());
ASSERT_EQ(3U, s[0]->InputCount());
EXPECT_EQ(s.ToVreg(p2), s.ToVreg(s[0]->InputAt(0)));
EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(1)));
EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(2)));
ASSERT_EQ(1U, s[0]->OutputCount());
- if (kArchVariant == kMips64r2) {
- EXPECT_FALSE(
- UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
- } else if (kArchVariant == kMips64r6) {
- EXPECT_TRUE(
- UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
- }
+ EXPECT_FALSE(
+ UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
EXPECT_EQ(kFlags_none, s[0]->flags_mode());
}
@@ -1792,29 +1786,23 @@ TEST_F(InstructionSelectorTest, Float32AddWithFloat32Mul) {
m.Return(n);
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
- if (kArchVariant == kMips64r2) {
- EXPECT_EQ(kMips64MaddS, s[0]->arch_opcode());
- } else if (kArchVariant == kMips64r6) {
- EXPECT_EQ(kMips64MaddfS, s[0]->arch_opcode());
- }
+ EXPECT_EQ(kMips64MaddS, s[0]->arch_opcode());
ASSERT_EQ(3U, s[0]->InputCount());
EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
EXPECT_EQ(s.ToVreg(p2), s.ToVreg(s[0]->InputAt(2)));
ASSERT_EQ(1U, s[0]->OutputCount());
- if (kArchVariant == kMips64r2) {
- EXPECT_FALSE(
- UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
- } else if (kArchVariant == kMips64r6) {
- EXPECT_TRUE(
- UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
- }
+ EXPECT_FALSE(
+ UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
EXPECT_EQ(kFlags_none, s[0]->flags_mode());
}
}
TEST_F(InstructionSelectorTest, Float64AddWithFloat64Mul) {
+ if (kArchVariant != kMips64r2) {
+ return;
+ }
{
StreamBuilder m(this, MachineType::Float64(), MachineType::Float64(),
MachineType::Float64(), MachineType::Float64());
@@ -1825,23 +1813,14 @@ TEST_F(InstructionSelectorTest, Float64AddWithFloat64Mul) {
m.Return(n);
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
- if (kArchVariant == kMips64r2) {
- EXPECT_EQ(kMips64MaddD, s[0]->arch_opcode());
- } else if (kArchVariant == kMips64r6) {
- EXPECT_EQ(kMips64MaddfD, s[0]->arch_opcode());
- }
+ EXPECT_EQ(kMips64MaddD, s[0]->arch_opcode());
ASSERT_EQ(3U, s[0]->InputCount());
EXPECT_EQ(s.ToVreg(p2), s.ToVreg(s[0]->InputAt(0)));
EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(1)));
EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(2)));
ASSERT_EQ(1U, s[0]->OutputCount());
- if (kArchVariant == kMips64r2) {
- EXPECT_FALSE(
- UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
- } else if (kArchVariant == kMips64r6) {
- EXPECT_TRUE(
- UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
- }
+ EXPECT_FALSE(
+ UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
EXPECT_EQ(kFlags_none, s[0]->flags_mode());
}
@@ -1855,23 +1834,14 @@ TEST_F(InstructionSelectorTest, Float64AddWithFloat64Mul) {
m.Return(n);
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
- if (kArchVariant == kMips64r2) {
- EXPECT_EQ(kMips64MaddD, s[0]->arch_opcode());
- } else if (kArchVariant == kMips64r6) {
- EXPECT_EQ(kMips64MaddfD, s[0]->arch_opcode());
- }
+ EXPECT_EQ(kMips64MaddD, s[0]->arch_opcode());
ASSERT_EQ(3U, s[0]->InputCount());
EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
EXPECT_EQ(s.ToVreg(p2), s.ToVreg(s[0]->InputAt(2)));
ASSERT_EQ(1U, s[0]->OutputCount());
- if (kArchVariant == kMips64r2) {
- EXPECT_FALSE(
- UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
- } else if (kArchVariant == kMips64r6) {
- EXPECT_TRUE(
- UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
- }
+ EXPECT_FALSE(
+ UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
EXPECT_EQ(kFlags_none, s[0]->flags_mode());
}
@@ -1880,73 +1850,57 @@ TEST_F(InstructionSelectorTest, Float64AddWithFloat64Mul) {
TEST_F(InstructionSelectorTest, Float32SubWithFloat32Mul) {
StreamBuilder m(this, MachineType::Float32(), MachineType::Float32(),
MachineType::Float32(), MachineType::Float32());
- Node* const p0 = m.Parameter(0);
- Node* const p1 = m.Parameter(1);
- Node* const p2 = m.Parameter(2);
- Node* n;
- if (kArchVariant == kMips64r2) {
- n = m.Float32Sub(m.Float32Mul(p1, p2), p0);
- } else if (kArchVariant == kMips64r6) {
- n = m.Float32Sub(p0, m.Float32Mul(p1, p2));
+ if (kArchVariant != kMips64r2) {
+ return;
}
- m.Return(n);
- Stream s = m.Build();
- ASSERT_EQ(1U, s.size());
- if (kArchVariant == kMips64r2) {
+ {
+ Node* const p0 = m.Parameter(0);
+ Node* const p1 = m.Parameter(1);
+ Node* const p2 = m.Parameter(2);
+ Node* n;
+ n = m.Float32Sub(m.Float32Mul(p1, p2), p0);
+ m.Return(n);
+ Stream s = m.Build();
+ ASSERT_EQ(1U, s.size());
EXPECT_EQ(kMips64MsubS, s[0]->arch_opcode());
- } else if (kArchVariant == kMips64r6) {
- EXPECT_EQ(kMips64MsubfS, s[0]->arch_opcode());
- }
- ASSERT_EQ(3U, s[0]->InputCount());
- EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
- EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
- EXPECT_EQ(s.ToVreg(p2), s.ToVreg(s[0]->InputAt(2)));
- ASSERT_EQ(1U, s[0]->OutputCount());
- if (kArchVariant == kMips64r2) {
+ ASSERT_EQ(3U, s[0]->InputCount());
+ EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
+ EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
+ EXPECT_EQ(s.ToVreg(p2), s.ToVreg(s[0]->InputAt(2)));
+ ASSERT_EQ(1U, s[0]->OutputCount());
EXPECT_FALSE(
UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
- } else if (kArchVariant == kMips64r6) {
- EXPECT_TRUE(
- UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
+ EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
+ EXPECT_EQ(kFlags_none, s[0]->flags_mode());
}
- EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
- EXPECT_EQ(kFlags_none, s[0]->flags_mode());
}
TEST_F(InstructionSelectorTest, Float64SubWithFloat64Mul) {
StreamBuilder m(this, MachineType::Float64(), MachineType::Float64(),
MachineType::Float64(), MachineType::Float64());
- Node* const p0 = m.Parameter(0);
- Node* const p1 = m.Parameter(1);
- Node* const p2 = m.Parameter(2);
- Node* n;
- if (kArchVariant == kMips64r2) {
- n = m.Float64Sub(m.Float64Mul(p1, p2), p0);
- } else if (kArchVariant == kMips64r6) {
- n = m.Float64Sub(p0, m.Float64Mul(p1, p2));
+ if (kArchVariant != kMips64r2) {
+ return;
}
- m.Return(n);
- Stream s = m.Build();
- ASSERT_EQ(1U, s.size());
- if (kArchVariant == kMips64r2) {
+ {
+ Node* const p0 = m.Parameter(0);
+ Node* const p1 = m.Parameter(1);
+ Node* const p2 = m.Parameter(2);
+ Node* n;
+ n = m.Float64Sub(m.Float64Mul(p1, p2), p0);
+ m.Return(n);
+ Stream s = m.Build();
+ ASSERT_EQ(1U, s.size());
EXPECT_EQ(kMips64MsubD, s[0]->arch_opcode());
- } else if (kArchVariant == kMips64r6) {
- EXPECT_EQ(kMips64MsubfD, s[0]->arch_opcode());
- }
- ASSERT_EQ(3U, s[0]->InputCount());
- EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
- EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
- EXPECT_EQ(s.ToVreg(p2), s.ToVreg(s[0]->InputAt(2)));
- ASSERT_EQ(1U, s[0]->OutputCount());
- if (kArchVariant == kMips64r2) {
+ ASSERT_EQ(3U, s[0]->InputCount());
+ EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
+ EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
+ EXPECT_EQ(s.ToVreg(p2), s.ToVreg(s[0]->InputAt(2)));
+ ASSERT_EQ(1U, s[0]->OutputCount());
EXPECT_FALSE(
UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
- } else if (kArchVariant == kMips64r6) {
- EXPECT_TRUE(
- UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
+ EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
+ EXPECT_EQ(kFlags_none, s[0]->flags_mode());
}
- EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
- EXPECT_EQ(kFlags_none, s[0]->flags_mode());
}
TEST_F(InstructionSelectorTest, Float64Max) {
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