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Side by Side Diff: src/compiler/mips/instruction-selector-mips.cc

Issue 2569683002: MIPS[64]: Disable fusion multiple-accumulate instructions (Closed)
Patch Set: Created 4 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
(...skipping 886 matching lines...) Expand 10 before | Expand all | Expand 10 after
897 void InstructionSelector::VisitBitcastInt32ToFloat32(Node* node) { 897 void InstructionSelector::VisitBitcastInt32ToFloat32(Node* node) {
898 MipsOperandGenerator g(this); 898 MipsOperandGenerator g(this);
899 Emit(kMipsFloat64InsertLowWord32, g.DefineAsRegister(node), 899 Emit(kMipsFloat64InsertLowWord32, g.DefineAsRegister(node),
900 ImmediateOperand(ImmediateOperand::INLINE, 0), 900 ImmediateOperand(ImmediateOperand::INLINE, 0),
901 g.UseRegister(node->InputAt(0))); 901 g.UseRegister(node->InputAt(0)));
902 } 902 }
903 903
904 904
905 void InstructionSelector::VisitFloat32Add(Node* node) { 905 void InstructionSelector::VisitFloat32Add(Node* node) {
906 MipsOperandGenerator g(this); 906 MipsOperandGenerator g(this);
907 Float32BinopMatcher m(node); 907 if (IsMipsArchVariant(kMips32r2)) { // Select Madd.S(z, x, y).
908 if (m.left().IsFloat32Mul() && CanCover(node, m.left().node())) { 908 Float32BinopMatcher m(node);
909 // For Add.S(Mul.S(x, y), z): 909 if (m.left().IsFloat32Mul() && CanCover(node, m.left().node())) {
910 Float32BinopMatcher mleft(m.left().node()); 910 // For Add.S(Mul.S(x, y), z):
911 if (IsMipsArchVariant(kMips32r2)) { // Select Madd.S(z, x, y). 911 Float32BinopMatcher mleft(m.left().node());
912 Emit(kMipsMaddS, g.DefineAsRegister(node), 912 Emit(kMipsMaddS, g.DefineAsRegister(node),
913 g.UseRegister(m.right().node()), g.UseRegister(mleft.left().node()), 913 g.UseRegister(m.right().node()), g.UseRegister(mleft.left().node()),
914 g.UseRegister(mleft.right().node())); 914 g.UseRegister(mleft.right().node()));
915 return; 915 return;
916 } else if (IsMipsArchVariant(kMips32r6)) { // Select Maddf.S(z, x, y).
917 Emit(kMipsMaddfS, g.DefineSameAsFirst(node),
918 g.UseRegister(m.right().node()), g.UseRegister(mleft.left().node()),
919 g.UseRegister(mleft.right().node()));
920 return;
921 } 916 }
922 } 917 if (m.right().IsFloat32Mul() && CanCover(node, m.right().node())) {
923 if (m.right().IsFloat32Mul() && CanCover(node, m.right().node())) { 918 // For Add.S(x, Mul.S(y, z)):
924 // For Add.S(x, Mul.S(y, z)): 919 Float32BinopMatcher mright(m.right().node());
925 Float32BinopMatcher mright(m.right().node());
926 if (IsMipsArchVariant(kMips32r2)) { // Select Madd.S(x, y, z).
927 Emit(kMipsMaddS, g.DefineAsRegister(node), g.UseRegister(m.left().node()), 920 Emit(kMipsMaddS, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
928 g.UseRegister(mright.left().node()), 921 g.UseRegister(mright.left().node()),
929 g.UseRegister(mright.right().node())); 922 g.UseRegister(mright.right().node()));
930 return; 923 return;
931 } else if (IsMipsArchVariant(kMips32r6)) { // Select Maddf.S(x, y, z).
932 Emit(kMipsMaddfS, g.DefineSameAsFirst(node),
933 g.UseRegister(m.left().node()), g.UseRegister(mright.left().node()),
934 g.UseRegister(mright.right().node()));
935 return;
936 } 924 }
937 } 925 }
938 VisitRRR(this, kMipsAddS, node); 926 VisitRRR(this, kMipsAddS, node);
939 } 927 }
940 928
941 929
942 void InstructionSelector::VisitFloat64Add(Node* node) { 930 void InstructionSelector::VisitFloat64Add(Node* node) {
943 MipsOperandGenerator g(this); 931 MipsOperandGenerator g(this);
944 Float64BinopMatcher m(node); 932 if (IsMipsArchVariant(kMips32r2)) { // Select Madd.S(z, x, y).
945 if (m.left().IsFloat64Mul() && CanCover(node, m.left().node())) { 933 Float64BinopMatcher m(node);
946 // For Add.D(Mul.D(x, y), z): 934 if (m.left().IsFloat64Mul() && CanCover(node, m.left().node())) {
947 Float64BinopMatcher mleft(m.left().node()); 935 // For Add.D(Mul.D(x, y), z):
948 if (IsMipsArchVariant(kMips32r2)) { // Select Madd.D(z, x, y). 936 Float64BinopMatcher mleft(m.left().node());
949 Emit(kMipsMaddD, g.DefineAsRegister(node), 937 Emit(kMipsMaddD, g.DefineAsRegister(node),
950 g.UseRegister(m.right().node()), g.UseRegister(mleft.left().node()), 938 g.UseRegister(m.right().node()), g.UseRegister(mleft.left().node()),
951 g.UseRegister(mleft.right().node())); 939 g.UseRegister(mleft.right().node()));
952 return; 940 return;
953 } else if (IsMipsArchVariant(kMips32r6)) { // Select Maddf.D(z, x, y).
954 Emit(kMipsMaddfD, g.DefineSameAsFirst(node),
955 g.UseRegister(m.right().node()), g.UseRegister(mleft.left().node()),
956 g.UseRegister(mleft.right().node()));
957 return;
958 } 941 }
959 } 942 if (m.right().IsFloat64Mul() && CanCover(node, m.right().node())) {
960 if (m.right().IsFloat64Mul() && CanCover(node, m.right().node())) { 943 // For Add.D(x, Mul.D(y, z)):
961 // For Add.D(x, Mul.D(y, z)): 944 Float64BinopMatcher mright(m.right().node());
962 Float64BinopMatcher mright(m.right().node());
963 if (IsMipsArchVariant(kMips32r2)) { // Select Madd.D(x, y, z).
964 Emit(kMipsMaddD, g.DefineAsRegister(node), g.UseRegister(m.left().node()), 945 Emit(kMipsMaddD, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
965 g.UseRegister(mright.left().node()), 946 g.UseRegister(mright.left().node()),
966 g.UseRegister(mright.right().node())); 947 g.UseRegister(mright.right().node()));
967 return; 948 return;
968 } else if (IsMipsArchVariant(kMips32r6)) { // Select Maddf.D(x, y, z).
969 Emit(kMipsMaddfD, g.DefineSameAsFirst(node),
970 g.UseRegister(m.left().node()), g.UseRegister(mright.left().node()),
971 g.UseRegister(mright.right().node()));
972 return;
973 } 949 }
974 } 950 }
975 VisitRRR(this, kMipsAddD, node); 951 VisitRRR(this, kMipsAddD, node);
976 } 952 }
977 953
978 954
979 void InstructionSelector::VisitFloat32Sub(Node* node) { 955 void InstructionSelector::VisitFloat32Sub(Node* node) {
980 MipsOperandGenerator g(this); 956 MipsOperandGenerator g(this);
981 Float32BinopMatcher m(node); 957 if (IsMipsArchVariant(kMips32r2)) { // Select Madd.S(z, x, y).
982 if (m.left().IsFloat32Mul() && CanCover(node, m.left().node())) { 958 Float32BinopMatcher m(node);
983 if (IsMipsArchVariant(kMips32r2)) { 959 if (m.left().IsFloat32Mul() && CanCover(node, m.left().node())) {
984 // For Sub.S(Mul.S(x,y), z) select Msub.S(z, x, y). 960 // For Sub.S(Mul.S(x,y), z) select Msub.S(z, x, y).
985 Float32BinopMatcher mleft(m.left().node()); 961 Float32BinopMatcher mleft(m.left().node());
986 Emit(kMipsMsubS, g.DefineAsRegister(node), 962 Emit(kMipsMsubS, g.DefineAsRegister(node),
987 g.UseRegister(m.right().node()), g.UseRegister(mleft.left().node()), 963 g.UseRegister(m.right().node()), g.UseRegister(mleft.left().node()),
988 g.UseRegister(mleft.right().node())); 964 g.UseRegister(mleft.right().node()));
989 return; 965 return;
990 } 966 }
991 } else if (m.right().IsFloat32Mul() && CanCover(node, m.right().node())) {
992 if (IsMipsArchVariant(kMips32r6)) {
993 // For Sub.S(x,Mul.S(y,z)) select Msubf.S(x, y, z).
994 Float32BinopMatcher mright(m.right().node());
995 Emit(kMipsMsubfS, g.DefineSameAsFirst(node),
996 g.UseRegister(m.left().node()), g.UseRegister(mright.left().node()),
997 g.UseRegister(mright.right().node()));
998 return;
999 }
1000 } 967 }
1001 VisitRRR(this, kMipsSubS, node); 968 VisitRRR(this, kMipsSubS, node);
1002 } 969 }
1003 970
1004 void InstructionSelector::VisitFloat64Sub(Node* node) { 971 void InstructionSelector::VisitFloat64Sub(Node* node) {
1005 MipsOperandGenerator g(this); 972 MipsOperandGenerator g(this);
1006 Float64BinopMatcher m(node); 973 if (IsMipsArchVariant(kMips32r2)) { // Select Madd.S(z, x, y).
1007 if (m.left().IsFloat64Mul() && CanCover(node, m.left().node())) { 974 Float64BinopMatcher m(node);
1008 if (IsMipsArchVariant(kMips32r2)) { 975 if (m.left().IsFloat64Mul() && CanCover(node, m.left().node())) {
1009 // For Sub.D(Mul.S(x,y), z) select Msub.D(z, x, y). 976 // For Sub.D(Mul.S(x,y), z) select Msub.D(z, x, y).
1010 Float64BinopMatcher mleft(m.left().node()); 977 Float64BinopMatcher mleft(m.left().node());
1011 Emit(kMipsMsubD, g.DefineAsRegister(node), 978 Emit(kMipsMsubD, g.DefineAsRegister(node),
1012 g.UseRegister(m.right().node()), g.UseRegister(mleft.left().node()), 979 g.UseRegister(m.right().node()), g.UseRegister(mleft.left().node()),
1013 g.UseRegister(mleft.right().node())); 980 g.UseRegister(mleft.right().node()));
1014 return; 981 return;
1015 } 982 }
1016 } else if (m.right().IsFloat64Mul() && CanCover(node, m.right().node())) {
1017 if (IsMipsArchVariant(kMips32r6)) {
1018 // For Sub.D(x,Mul.S(y,z)) select Msubf.D(x, y, z).
1019 Float64BinopMatcher mright(m.right().node());
1020 Emit(kMipsMsubfD, g.DefineSameAsFirst(node),
1021 g.UseRegister(m.left().node()), g.UseRegister(mright.left().node()),
1022 g.UseRegister(mright.right().node()));
1023 return;
1024 }
1025 } 983 }
1026 VisitRRR(this, kMipsSubD, node); 984 VisitRRR(this, kMipsSubD, node);
1027 } 985 }
1028 986
1029 void InstructionSelector::VisitFloat32Mul(Node* node) { 987 void InstructionSelector::VisitFloat32Mul(Node* node) {
1030 VisitRRR(this, kMipsMulS, node); 988 VisitRRR(this, kMipsMulS, node);
1031 } 989 }
1032 990
1033 991
1034 void InstructionSelector::VisitFloat64Mul(Node* node) { 992 void InstructionSelector::VisitFloat64Mul(Node* node) {
(...skipping 886 matching lines...) Expand 10 before | Expand all | Expand 10 after
1921 DCHECK(IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r1) || 1879 DCHECK(IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r1) ||
1922 IsMipsArchVariant(kMips32r2)); 1880 IsMipsArchVariant(kMips32r2));
1923 return MachineOperatorBuilder::AlignmentRequirements:: 1881 return MachineOperatorBuilder::AlignmentRequirements::
1924 NoUnalignedAccessSupport(); 1882 NoUnalignedAccessSupport();
1925 } 1883 }
1926 } 1884 }
1927 1885
1928 } // namespace compiler 1886 } // namespace compiler
1929 } // namespace internal 1887 } // namespace internal
1930 } // namespace v8 1888 } // namespace v8
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