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Side by Side Diff: src/compiler/mips/instruction-codes-mips.h

Issue 2569683002: MIPS[64]: Disable fusion multiple-accumulate instructions (Closed)
Patch Set: Created 4 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 53 matching lines...) Expand 10 before | Expand all | Expand 10 after
64 V(MipsSqrtD) \ 64 V(MipsSqrtD) \
65 V(MipsMaxD) \ 65 V(MipsMaxD) \
66 V(MipsMinD) \ 66 V(MipsMinD) \
67 V(MipsNegS) \ 67 V(MipsNegS) \
68 V(MipsNegD) \ 68 V(MipsNegD) \
69 V(MipsAddPair) \ 69 V(MipsAddPair) \
70 V(MipsSubPair) \ 70 V(MipsSubPair) \
71 V(MipsMulPair) \ 71 V(MipsMulPair) \
72 V(MipsMaddS) \ 72 V(MipsMaddS) \
73 V(MipsMaddD) \ 73 V(MipsMaddD) \
74 V(MipsMaddfS) \
75 V(MipsMaddfD) \
76 V(MipsMsubS) \ 74 V(MipsMsubS) \
77 V(MipsMsubD) \ 75 V(MipsMsubD) \
78 V(MipsMsubfS) \
79 V(MipsMsubfD) \
80 V(MipsFloat32RoundDown) \ 76 V(MipsFloat32RoundDown) \
81 V(MipsFloat32RoundTruncate) \ 77 V(MipsFloat32RoundTruncate) \
82 V(MipsFloat32RoundUp) \ 78 V(MipsFloat32RoundUp) \
83 V(MipsFloat32RoundTiesEven) \ 79 V(MipsFloat32RoundTiesEven) \
84 V(MipsFloat64RoundDown) \ 80 V(MipsFloat64RoundDown) \
85 V(MipsFloat64RoundTruncate) \ 81 V(MipsFloat64RoundTruncate) \
86 V(MipsFloat64RoundUp) \ 82 V(MipsFloat64RoundUp) \
87 V(MipsFloat64RoundTiesEven) \ 83 V(MipsFloat64RoundTiesEven) \
88 V(MipsCvtSD) \ 84 V(MipsCvtSD) \
89 V(MipsCvtDS) \ 85 V(MipsCvtDS) \
(...skipping 65 matching lines...) Expand 10 before | Expand all | Expand 10 after
155 #define TARGET_ADDRESSING_MODE_LIST(V) \ 151 #define TARGET_ADDRESSING_MODE_LIST(V) \
156 V(MRI) /* [%r0 + K] */ \ 152 V(MRI) /* [%r0 + K] */ \
157 V(MRR) /* [%r0 + %r1] */ 153 V(MRR) /* [%r0 + %r1] */
158 154
159 155
160 } // namespace compiler 156 } // namespace compiler
161 } // namespace internal 157 } // namespace internal
162 } // namespace v8 158 } // namespace v8
163 159
164 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 160 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
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