[turbofan] regalloc: avoid more redundant intersections

[turbofan] regalloc: avoid more redundant intersections

Same idea as in the previous change. In addition, explicitly limited to non-aliased
registers, because the logic there needs to take account of, well, alias IDs. Left a
TODO for that part.

BUG=v8:5644
Committed: https://crrev.com/dd10d9b100ecddd0568d224fbc93d1d8b97405f5
Cr-Commit-Position: refs/heads/master@{#41609}

[Mircea Trofin, 2016-12-08 21:39:26]

The CQ bit was checked by mtrofin@chromium.org to run a CQ dry run

[commit-bot: I haz the power, 2016-12-08 21:39:34]

Dry run: CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[Mircea Trofin, 2016-12-08 22:43:44]

Description was changed from

==========
[turbofan] regalloc: avoid more redundant intersections

BUG=
==========

to

==========
[turbofan] regalloc: avoid more redundant intersections

Same idea as in the previous change. In addition, explicitly limited to
non-aliased
registers, because the logic there needs to take account of, well, alias IDs.
Left a 
TODO for that part.

BUG=v8:5644
==========

[Mircea Trofin, 2016-12-08 22:43:44]

mtrofin@chromium.org changed reviewers:
+ bradnelson@chromium.org, titzer@chromium.org

[Mircea Trofin, 2016-12-08 22:45:03]

ptal - this further lowers the cost of register allocation in pathological
cases like sqllite. We're now at ~1/3 of the time it took, originally, to 
compile sqllite.

[commit-bot: I haz the power, 2016-12-08 23:04:10]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2016-12-08 23:04:11]

Dry run: This issue passed the CQ dry run.

[titzer, 2016-12-08 23:34:00]

lgtm

[Mircea Trofin, 2016-12-08 23:34:22]

The CQ bit was checked by mtrofin@chromium.org

[commit-bot: I haz the power, 2016-12-08 23:34:26]

CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[commit-bot: I haz the power, 2016-12-09 06:59:04]

CQ is committing da patch.

Bot data: {"patchset_id": 1, "attempt_start_ts": 1481240062869400, "parent_rev":
"1da3b077ff42bc086a13f3181ffd0e421152bb71", "commit_rev":
"523b2b750ae75c8fbef055711c56f9a2fdabf1a7"}

[commit-bot: I haz the power, 2016-12-09 06:59:09]

Description was changed from

==========
[turbofan] regalloc: avoid more redundant intersections

Same idea as in the previous change. In addition, explicitly limited to
non-aliased
registers, because the logic there needs to take account of, well, alias IDs.
Left a 
TODO for that part.

BUG=v8:5644
==========

to

==========
[turbofan] regalloc: avoid more redundant intersections

Same idea as in the previous change. In addition, explicitly limited to
non-aliased
registers, because the logic there needs to take account of, well, alias IDs.
Left a 
TODO for that part.

BUG=v8:5644
==========

[commit-bot: I haz the power, 2016-12-09 06:59:10]

Committed patchset #1 (id:1)

[commit-bot: I haz the power, 2016-12-09 06:59:50]

Description was changed from

==========
[turbofan] regalloc: avoid more redundant intersections

Same idea as in the previous change. In addition, explicitly limited to
non-aliased
registers, because the logic there needs to take account of, well, alias IDs.
Left a 
TODO for that part.

BUG=v8:5644
==========

to

==========
[turbofan] regalloc: avoid more redundant intersections

Same idea as in the previous change. In addition, explicitly limited to
non-aliased
registers, because the logic there needs to take account of, well, alias IDs.
Left a
TODO for that part.

BUG=v8:5644

Committed: https://crrev.com/dd10d9b100ecddd0568d224fbc93d1d8b97405f5
Cr-Commit-Position: refs/heads/master@{#41609}
==========

[commit-bot: I haz the power, 2016-12-09 06:59:51]

Patchset 1 (id:??) landed as
https://crrev.com/dd10d9b100ecddd0568d224fbc93d1d8b97405f5
Cr-Commit-Position: refs/heads/master@{#41609}