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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/base/adapters.h" | 5 #include "src/base/adapters.h" |
6 #include "src/compiler/instruction-selector-impl.h" | 6 #include "src/compiler/instruction-selector-impl.h" |
7 #include "src/compiler/node-matchers.h" | 7 #include "src/compiler/node-matchers.h" |
8 #include "src/compiler/node-properties.h" | 8 #include "src/compiler/node-properties.h" |
9 | 9 |
10 namespace v8 { | 10 namespace v8 { |
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383 case MachineRepresentation::kBit: // Fall through. | 383 case MachineRepresentation::kBit: // Fall through. |
384 case MachineRepresentation::kTaggedSigned: // Fall through. | 384 case MachineRepresentation::kTaggedSigned: // Fall through. |
385 case MachineRepresentation::kTaggedPointer: // Fall through. | 385 case MachineRepresentation::kTaggedPointer: // Fall through. |
386 case MachineRepresentation::kTagged: // Fall through. | 386 case MachineRepresentation::kTagged: // Fall through. |
387 case MachineRepresentation::kWord64: // Fall through. | 387 case MachineRepresentation::kWord64: // Fall through. |
388 case MachineRepresentation::kSimd128: // Fall through. | 388 case MachineRepresentation::kSimd128: // Fall through. |
389 case MachineRepresentation::kNone: | 389 case MachineRepresentation::kNone: |
390 UNREACHABLE(); | 390 UNREACHABLE(); |
391 return; | 391 return; |
392 } | 392 } |
393 InstructionOperand offset_operand = g.UseRegister(offset); | 393 Int32Matcher mbuffer(buffer); |
| 394 InstructionOperand buffer_operand = |
| 395 mbuffer.HasValue() ? g.UseImmediate(buffer) : g.UseRegister(buffer); |
| 396 if (offset->opcode() == IrOpcode::kInt32Add && CanCover(node, offset)) { |
| 397 Int32Matcher mlength(length); |
| 398 Int32BinopMatcher moffset(offset); |
| 399 if (mlength.HasValue() && moffset.right().HasValue() && |
| 400 moffset.right().Value() > 0 && |
| 401 mlength.Value() >= moffset.right().Value()) { |
| 402 Emit(opcode, g.DefineAsRegister(node), buffer_operand, |
| 403 g.UseRegister(moffset.left().node()), |
| 404 g.UseImmediate(moffset.right().node()), g.UseImmediate(length)); |
| 405 return; |
| 406 } |
| 407 } |
394 InstructionOperand length_operand = | 408 InstructionOperand length_operand = |
395 g.CanBeImmediate(length) ? g.UseImmediate(length) : g.UseRegister(length); | 409 g.CanBeImmediate(length) ? g.UseImmediate(length) : g.UseRegister(length); |
396 if (g.CanBeImmediate(buffer)) { | 410 Emit(opcode, g.DefineAsRegister(node), buffer_operand, g.UseRegister(offset), |
397 Emit(opcode | AddressingModeField::encode(kMode_MRI), | 411 g.TempImmediate(0), length_operand); |
398 g.DefineAsRegister(node), offset_operand, length_operand, | |
399 offset_operand, g.UseImmediate(buffer)); | |
400 } else { | |
401 Emit(opcode | AddressingModeField::encode(kMode_MR1), | |
402 g.DefineAsRegister(node), offset_operand, length_operand, | |
403 g.UseRegister(buffer), offset_operand); | |
404 } | |
405 } | 412 } |
406 | 413 |
407 | 414 |
408 void InstructionSelector::VisitCheckedStore(Node* node) { | 415 void InstructionSelector::VisitCheckedStore(Node* node) { |
409 MachineRepresentation rep = CheckedStoreRepresentationOf(node->op()); | 416 MachineRepresentation rep = CheckedStoreRepresentationOf(node->op()); |
410 IA32OperandGenerator g(this); | 417 IA32OperandGenerator g(this); |
411 Node* const buffer = node->InputAt(0); | 418 Node* const buffer = node->InputAt(0); |
412 Node* const offset = node->InputAt(1); | 419 Node* const offset = node->InputAt(1); |
413 Node* const length = node->InputAt(2); | 420 Node* const length = node->InputAt(2); |
414 Node* const value = node->InputAt(3); | 421 Node* const value = node->InputAt(3); |
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438 case MachineRepresentation::kNone: | 445 case MachineRepresentation::kNone: |
439 UNREACHABLE(); | 446 UNREACHABLE(); |
440 return; | 447 return; |
441 } | 448 } |
442 InstructionOperand value_operand = | 449 InstructionOperand value_operand = |
443 g.CanBeImmediate(value) ? g.UseImmediate(value) | 450 g.CanBeImmediate(value) ? g.UseImmediate(value) |
444 : ((rep == MachineRepresentation::kWord8 || | 451 : ((rep == MachineRepresentation::kWord8 || |
445 rep == MachineRepresentation::kBit) | 452 rep == MachineRepresentation::kBit) |
446 ? g.UseByteRegister(value) | 453 ? g.UseByteRegister(value) |
447 : g.UseRegister(value)); | 454 : g.UseRegister(value)); |
448 InstructionOperand offset_operand = g.UseRegister(offset); | 455 Int32Matcher mbuffer(buffer); |
| 456 InstructionOperand buffer_operand = |
| 457 mbuffer.HasValue() ? g.UseImmediate(buffer) : g.UseRegister(buffer); |
| 458 if (offset->opcode() == IrOpcode::kInt32Add && CanCover(node, offset)) { |
| 459 Int32Matcher mlength(length); |
| 460 Int32BinopMatcher moffset(offset); |
| 461 if (mlength.HasValue() && moffset.right().HasValue() && |
| 462 moffset.right().Value() > 0 && |
| 463 mlength.Value() >= moffset.right().Value()) { |
| 464 Emit(opcode, g.NoOutput(), buffer_operand, |
| 465 g.UseRegister(moffset.left().node()), |
| 466 g.UseImmediate(moffset.right().node()), g.UseImmediate(length), |
| 467 value_operand); |
| 468 return; |
| 469 } |
| 470 } |
449 InstructionOperand length_operand = | 471 InstructionOperand length_operand = |
450 g.CanBeImmediate(length) ? g.UseImmediate(length) : g.UseRegister(length); | 472 g.CanBeImmediate(length) ? g.UseImmediate(length) : g.UseRegister(length); |
451 if (g.CanBeImmediate(buffer)) { | 473 Emit(opcode, g.NoOutput(), buffer_operand, g.UseRegister(offset), |
452 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(), | 474 g.TempImmediate(0), length_operand, value_operand); |
453 offset_operand, length_operand, value_operand, offset_operand, | |
454 g.UseImmediate(buffer)); | |
455 } else { | |
456 Emit(opcode | AddressingModeField::encode(kMode_MR1), g.NoOutput(), | |
457 offset_operand, length_operand, value_operand, g.UseRegister(buffer), | |
458 offset_operand); | |
459 } | |
460 } | 475 } |
461 | 476 |
462 namespace { | 477 namespace { |
463 | 478 |
464 // Shared routine for multiple binary operations. | 479 // Shared routine for multiple binary operations. |
465 void VisitBinop(InstructionSelector* selector, Node* node, | 480 void VisitBinop(InstructionSelector* selector, Node* node, |
466 InstructionCode opcode, FlagsContinuation* cont) { | 481 InstructionCode opcode, FlagsContinuation* cont) { |
467 IA32OperandGenerator g(selector); | 482 IA32OperandGenerator g(selector); |
468 Int32BinopMatcher m(node); | 483 Int32BinopMatcher m(node); |
469 Node* left = m.left().node(); | 484 Node* left = m.left().node(); |
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1747 // static | 1762 // static |
1748 MachineOperatorBuilder::AlignmentRequirements | 1763 MachineOperatorBuilder::AlignmentRequirements |
1749 InstructionSelector::AlignmentRequirements() { | 1764 InstructionSelector::AlignmentRequirements() { |
1750 return MachineOperatorBuilder::AlignmentRequirements:: | 1765 return MachineOperatorBuilder::AlignmentRequirements:: |
1751 FullUnalignedAccessSupport(); | 1766 FullUnalignedAccessSupport(); |
1752 } | 1767 } |
1753 | 1768 |
1754 } // namespace compiler | 1769 } // namespace compiler |
1755 } // namespace internal | 1770 } // namespace internal |
1756 } // namespace v8 | 1771 } // namespace v8 |
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