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Side by Side Diff: src/compiler/ppc/instruction-codes-ppc.h

Issue 2559433003: PPC: Split kPPC_Add into kPPC_Add[32|64] (Closed)
Patch Set: extsw outside the if/else block Created 4 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ 5 #ifndef V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_
6 #define V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ 6 #define V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 15 matching lines...) Expand all
26 V(PPC_ShiftRightAlg32) \ 26 V(PPC_ShiftRightAlg32) \
27 V(PPC_ShiftRightAlg64) \ 27 V(PPC_ShiftRightAlg64) \
28 V(PPC_ShiftRightAlgPair) \ 28 V(PPC_ShiftRightAlgPair) \
29 V(PPC_RotRight32) \ 29 V(PPC_RotRight32) \
30 V(PPC_RotRight64) \ 30 V(PPC_RotRight64) \
31 V(PPC_Not) \ 31 V(PPC_Not) \
32 V(PPC_RotLeftAndMask32) \ 32 V(PPC_RotLeftAndMask32) \
33 V(PPC_RotLeftAndClear64) \ 33 V(PPC_RotLeftAndClear64) \
34 V(PPC_RotLeftAndClearLeft64) \ 34 V(PPC_RotLeftAndClearLeft64) \
35 V(PPC_RotLeftAndClearRight64) \ 35 V(PPC_RotLeftAndClearRight64) \
36 V(PPC_Add) \ 36 V(PPC_Add32) \
37 V(PPC_Add64) \
37 V(PPC_AddWithOverflow32) \ 38 V(PPC_AddWithOverflow32) \
38 V(PPC_AddPair) \ 39 V(PPC_AddPair) \
39 V(PPC_AddDouble) \ 40 V(PPC_AddDouble) \
40 V(PPC_Sub) \ 41 V(PPC_Sub) \
41 V(PPC_SubWithOverflow32) \ 42 V(PPC_SubWithOverflow32) \
42 V(PPC_SubPair) \ 43 V(PPC_SubPair) \
43 V(PPC_SubDouble) \ 44 V(PPC_SubDouble) \
44 V(PPC_Mul32) \ 45 V(PPC_Mul32) \
45 V(PPC_Mul32WithHigh32) \ 46 V(PPC_Mul32WithHigh32) \
46 V(PPC_Mul64) \ 47 V(PPC_Mul64) \
47 V(PPC_MulHigh32) \ 48 V(PPC_MulHigh32) \
48 V(PPC_MulHighU32) \ 49 V(PPC_MulHighU32) \
49 V(PPC_MulPair) \ 50 V(PPC_MulPair) \
50 V(PPC_MulDouble) \ 51 V(PPC_MulDouble) \
51 V(PPC_Div32) \ 52 V(PPC_Div32) \
52 V(PPC_Div64) \ 53 V(PPC_Div64) \
53 V(PPC_DivU32) \ 54 V(PPC_DivU32) \
54 V(PPC_DivU64) \ 55 V(PPC_DivU64) \
55 V(PPC_DivDouble) \ 56 V(PPC_DivDouble) \
(...skipping 84 matching lines...) Expand 10 before | Expand all | Expand 10 after
140 // MRR = [register + register] 141 // MRR = [register + register]
141 #define TARGET_ADDRESSING_MODE_LIST(V) \ 142 #define TARGET_ADDRESSING_MODE_LIST(V) \
142 V(MRI) /* [%r0 + K] */ \ 143 V(MRI) /* [%r0 + K] */ \
143 V(MRR) /* [%r0 + %r1] */ 144 V(MRR) /* [%r0 + %r1] */
144 145
145 } // namespace compiler 146 } // namespace compiler
146 } // namespace internal 147 } // namespace internal
147 } // namespace v8 148 } // namespace v8
148 149
149 #endif // V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ 150 #endif // V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_
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