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Side by Side Diff: src/compiler/ppc/code-generator-ppc.cc

Issue 2559433003: PPC: Split kPPC_Add into kPPC_Add[32|64] (Closed)
Patch Set: extsw outside the if/else block Created 4 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/compilation-info.h" 7 #include "src/compilation-info.h"
8 #include "src/compiler/code-generator-impl.h" 8 #include "src/compiler/code-generator-impl.h"
9 #include "src/compiler/gap-resolver.h" 9 #include "src/compiler/gap-resolver.h"
10 #include "src/compiler/node-matchers.h" 10 #include "src/compiler/node-matchers.h"
(...skipping 245 matching lines...) Expand 10 before | Expand all | Expand 10 after
256 case kSignedLessThanOrEqual: 256 case kSignedLessThanOrEqual:
257 case kUnsignedLessThanOrEqual: 257 case kUnsignedLessThanOrEqual:
258 return le; 258 return le;
259 case kSignedGreaterThan: 259 case kSignedGreaterThan:
260 case kUnsignedGreaterThan: 260 case kUnsignedGreaterThan:
261 return gt; 261 return gt;
262 case kOverflow: 262 case kOverflow:
263 // Overflow checked for add/sub only. 263 // Overflow checked for add/sub only.
264 switch (op) { 264 switch (op) {
265 #if V8_TARGET_ARCH_PPC64 265 #if V8_TARGET_ARCH_PPC64
266 case kPPC_Add: 266 case kPPC_Add32:
267 case kPPC_Add64:
267 case kPPC_Sub: 268 case kPPC_Sub:
268 #endif 269 #endif
269 case kPPC_AddWithOverflow32: 270 case kPPC_AddWithOverflow32:
270 case kPPC_SubWithOverflow32: 271 case kPPC_SubWithOverflow32:
271 return lt; 272 return lt;
272 default: 273 default:
273 break; 274 break;
274 } 275 }
275 break; 276 break;
276 case kNotOverflow: 277 case kNotOverflow:
277 switch (op) { 278 switch (op) {
278 #if V8_TARGET_ARCH_PPC64 279 #if V8_TARGET_ARCH_PPC64
279 case kPPC_Add: 280 case kPPC_Add32:
281 case kPPC_Add64:
280 case kPPC_Sub: 282 case kPPC_Sub:
281 #endif 283 #endif
282 case kPPC_AddWithOverflow32: 284 case kPPC_AddWithOverflow32:
283 case kPPC_SubWithOverflow32: 285 case kPPC_SubWithOverflow32:
284 return ge; 286 return ge;
285 default: 287 default:
286 break; 288 break;
287 } 289 }
288 break; 290 break;
289 default: 291 default:
(...skipping 1025 matching lines...) Expand 10 before | Expand all | Expand 10 after
1315 break; 1317 break;
1316 case kPPC_RotLeftAndClearLeft64: 1318 case kPPC_RotLeftAndClearLeft64:
1317 __ rldicl(i.OutputRegister(), i.InputRegister(0), i.InputInt32(1), 1319 __ rldicl(i.OutputRegister(), i.InputRegister(0), i.InputInt32(1),
1318 63 - i.InputInt32(2), i.OutputRCBit()); 1320 63 - i.InputInt32(2), i.OutputRCBit());
1319 break; 1321 break;
1320 case kPPC_RotLeftAndClearRight64: 1322 case kPPC_RotLeftAndClearRight64:
1321 __ rldicr(i.OutputRegister(), i.InputRegister(0), i.InputInt32(1), 1323 __ rldicr(i.OutputRegister(), i.InputRegister(0), i.InputInt32(1),
1322 63 - i.InputInt32(2), i.OutputRCBit()); 1324 63 - i.InputInt32(2), i.OutputRCBit());
1323 break; 1325 break;
1324 #endif 1326 #endif
1325 case kPPC_Add: 1327 case kPPC_Add32:
1326 #if V8_TARGET_ARCH_PPC64 1328 #if V8_TARGET_ARCH_PPC64
1327 if (FlagsModeField::decode(instr->opcode()) != kFlags_none) { 1329 if (FlagsModeField::decode(instr->opcode()) != kFlags_none) {
1328 ASSEMBLE_ADD_WITH_OVERFLOW(); 1330 ASSEMBLE_ADD_WITH_OVERFLOW();
1329 } else { 1331 } else {
1330 #endif 1332 #endif
1331 if (HasRegisterInput(instr, 1)) { 1333 if (HasRegisterInput(instr, 1)) {
1332 __ add(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1), 1334 __ add(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1),
1333 LeaveOE, i.OutputRCBit()); 1335 LeaveOE, i.OutputRCBit());
1334 } else { 1336 } else {
1335 __ addi(i.OutputRegister(), i.InputRegister(0), i.InputImmediate(1)); 1337 __ addi(i.OutputRegister(), i.InputRegister(0), i.InputImmediate(1));
1336 DCHECK_EQ(LeaveRC, i.OutputRCBit()); 1338 DCHECK_EQ(LeaveRC, i.OutputRCBit());
1337 } 1339 }
1340 __ extsw(i.OutputRegister(), i.OutputRegister());
1338 #if V8_TARGET_ARCH_PPC64 1341 #if V8_TARGET_ARCH_PPC64
1339 } 1342 }
1340 #endif 1343 #endif
1341 break; 1344 break;
1345 #if V8_TARGET_ARCH_PPC64
1346 case kPPC_Add64:
1347 if (FlagsModeField::decode(instr->opcode()) != kFlags_none) {
1348 ASSEMBLE_ADD_WITH_OVERFLOW();
1349 } else {
1350 if (HasRegisterInput(instr, 1)) {
1351 __ add(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1),
1352 LeaveOE, i.OutputRCBit());
1353 } else {
1354 __ addi(i.OutputRegister(), i.InputRegister(0), i.InputImmediate(1));
1355 DCHECK_EQ(LeaveRC, i.OutputRCBit());
1356 }
1357 }
1358 break;
1359 #endif
1342 case kPPC_AddWithOverflow32: 1360 case kPPC_AddWithOverflow32:
1343 ASSEMBLE_ADD_WITH_OVERFLOW32(); 1361 ASSEMBLE_ADD_WITH_OVERFLOW32();
1344 break; 1362 break;
1345 case kPPC_AddDouble: 1363 case kPPC_AddDouble:
1346 ASSEMBLE_FLOAT_BINOP_RC(fadd, MiscField::decode(instr->opcode())); 1364 ASSEMBLE_FLOAT_BINOP_RC(fadd, MiscField::decode(instr->opcode()));
1347 break; 1365 break;
1348 case kPPC_Sub: 1366 case kPPC_Sub:
1349 #if V8_TARGET_ARCH_PPC64 1367 #if V8_TARGET_ARCH_PPC64
1350 if (FlagsModeField::decode(instr->opcode()) != kFlags_none) { 1368 if (FlagsModeField::decode(instr->opcode()) != kFlags_none) {
1351 ASSEMBLE_SUB_WITH_OVERFLOW(); 1369 ASSEMBLE_SUB_WITH_OVERFLOW();
(...skipping 1105 matching lines...) Expand 10 before | Expand all | Expand 10 after
2457 padding_size -= v8::internal::Assembler::kInstrSize; 2475 padding_size -= v8::internal::Assembler::kInstrSize;
2458 } 2476 }
2459 } 2477 }
2460 } 2478 }
2461 2479
2462 #undef __ 2480 #undef __
2463 2481
2464 } // namespace compiler 2482 } // namespace compiler
2465 } // namespace internal 2483 } // namespace internal
2466 } // namespace v8 2484 } // namespace v8
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