Enables simple static call test on arm64.

runtime/vm/assembler_arm64.cc

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM64)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/longjump.h"
@@ skipping 247 matching lines @@
 
 
 void Assembler::LoadPoolPointer(Register pp) {
   const intptr_t object_pool_pc_dist =
     Instructions::HeaderSize() - Instructions::object_pool_offset() +
     CodeSize();
   // PP <- Read(PC - object_pool_pc_dist).
   ldr(pp, Address::PC(-object_pool_pc_dist));
 
   // When in the PP register, the pool pointer is untagged. When we
-  // push it on the stack with PushPP it is tagged again. PopPP then untags
-  // when restoring from the stack. This will make loading from the object
-  // pool only one instruction for the first 4096 entries. Otherwise, because
-  // the offset wouldn't be aligned, it would be only one instruction for the
-  // first 64 entries.
+  // push it on the stack with TagAndPushPP it is tagged again. PopAndUntagPP
+  // then untags when restoring from the stack. This will make loading from the
+  // object pool only one instruction for the first 4096 entries. Otherwise,
+  // because the offset wouldn't be aligned, it would be only one instruction
+  // for the first 64 entries.
   sub(pp, pp, Operand(kHeapObjectTag));
 }
 
 void Assembler::LoadWordFromPoolOffset(Register dst, Register pp,
                                        uint32_t offset) {
   ASSERT(dst != pp);
   if (Address::CanHoldOffset(offset)) {
     ldr(dst, Address(pp, offset));
   } else {
     const uint16_t offset_low = Utils::Low16Bits(offset);
@@ skipping 271 matching lines @@
   } else if (Operand::CanHold(-imm, kXRegSizeInBits, &op) ==
              Operand::Immediate) {
     cmn(rn, op);
   } else {
     LoadImmediate(TMP2, imm, pp);
     cmp(rn, Operand(TMP2));
   }
 }
 
 
-void Assembler::LoadFromOffset(Register dest, Register base, int32_t offset) {
+void Assembler::LoadFromOffset(
+    Register dest, Register base, int32_t offset, OperandSize sz) {
   ASSERT(base != TMP2);
   if (Address::CanHoldOffset(offset)) {
-    ldr(dest, Address(base, offset));
+    ldr(dest, Address(base, offset), sz);
   } else {
     // Since offset is 32-bits, it won't be loaded from the pool.
     AddImmediate(TMP2, base, offset, kNoRegister);
-    ldr(dest, Address(TMP2));
+    ldr(dest, Address(TMP2), sz);
   }
 }
 
 
-void Assembler::StoreToOffset(Register src, Register base, int32_t offset) {
+void Assembler::StoreToOffset(
+    Register src, Register base, int32_t offset, OperandSize sz) {
   ASSERT(src != TMP2);
   ASSERT(base != TMP2);
   if (Address::CanHoldOffset(offset)) {
-    str(src, Address(base, offset));
-  } else if (Address::CanHoldOffset(offset, Address::PreIndex)) {
-    mov(TMP2, base);
-    str(src, Address(TMP2, offset, Address::PreIndex));
+    str(src, Address(base, offset), sz);
   } else {
     // Since offset is 32-bits, it won't be loaded from the pool.
     AddImmediate(TMP2, base, offset, kNoRegister);
-    str(src, Address(TMP2));
+    str(src, Address(TMP2), sz);
   }
 }
 
 
 // Store into object.
 // Preserves object and value registers.
 void Assembler::StoreIntoObjectFilterNoSmi(Register object,
                                            Register value,
                                            Label* no_update) {
   COMPILE_ASSERT((kNewObjectAlignmentOffset == kWordSize) &&
@@ skipping 108 matching lines @@
   Pop(FP);
   Pop(LR);
 }
 
 
 void Assembler::EnterDartFrame(intptr_t frame_size) {
   // Setup the frame.
   adr(TMP, 0);  // TMP gets PC of this instruction.
   EnterFrame(0);
   Push(TMP);  // Save PC Marker.
-  PushPP();  // Save PP.
+  TagAndPushPP();  // Save PP.
 
   // Load the pool pointer.
   LoadPoolPointer(PP);
 
   // Reserve space.
   if (frame_size > 0) {
     sub(SP, SP, Operand(frame_size));
   }
 }
 
 
 void Assembler::EnterDartFrameWithInfo(intptr_t frame_size, Register new_pp) {
   // Setup the frame.
   adr(TMP, 0);  // TMP gets PC of this instruction.
   EnterFrame(0);
   Push(TMP);  // Save PC Marker.
-  PushPP();  // Save PP.
+  TagAndPushPP();  // Save PP.
 
   // Load the pool pointer.
   if (new_pp == kNoRegister) {
     LoadPoolPointer(PP);
   } else {
     mov(PP, new_pp);
   }
 
   // Reserve space.
   if (frame_size > 0) {
@@ skipping 67 matching lines @@
   Pop(FP);
   Pop(LR);
 }
 
 
 void Assembler::CallRuntime(const RuntimeEntry& entry,
                             intptr_t argument_count) {
   entry.Call(this, argument_count);
 }
 
+
+void Assembler::EnterStubFrame(bool load_pp) {
+  EnterFrame(0);
+  Push(ZR);  // Push 0 in the saved PC area for stub frames.
+  TagAndPushPP();  // Save caller's pool pointer
+  if (load_pp) {
+    LoadPoolPointer(PP);
+  }
+}
+
+
+void Assembler::LeaveStubFrame() {
+  // Restore and untag PP.
+  LoadFromOffset(PP, FP, kSavedCallerPpSlotFromFp * kWordSize);
+  sub(PP, PP, Operand(kHeapObjectTag));
+  LeaveFrame();
+}
+
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM64