OLD | NEW |
1 // Copyright 2014 The Crashpad Authors. All rights reserved. | 1 // Copyright 2014 The Crashpad Authors. All rights reserved. |
2 // | 2 // |
3 // Licensed under the Apache License, Version 2.0 (the "License"); | 3 // Licensed under the Apache License, Version 2.0 (the "License"); |
4 // you may not use this file except in compliance with the License. | 4 // you may not use this file except in compliance with the License. |
5 // You may obtain a copy of the License at | 5 // You may obtain a copy of the License at |
6 // | 6 // |
7 // http://www.apache.org/licenses/LICENSE-2.0 | 7 // http://www.apache.org/licenses/LICENSE-2.0 |
8 // | 8 // |
9 // Unless required by applicable law or agreed to in writing, software | 9 // Unless required by applicable law or agreed to in writing, software |
10 // distributed under the License is distributed on an "AS IS" BASIS, | 10 // distributed under the License is distributed on an "AS IS" BASIS, |
(...skipping 47 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
58 #define PROCESSOR_ARCHITECTURE_ALPHA 2 | 58 #define PROCESSOR_ARCHITECTURE_ALPHA 2 |
59 #define PROCESSOR_ARCHITECTURE_PPC 3 | 59 #define PROCESSOR_ARCHITECTURE_PPC 3 |
60 #define PROCESSOR_ARCHITECTURE_SHX 4 | 60 #define PROCESSOR_ARCHITECTURE_SHX 4 |
61 #define PROCESSOR_ARCHITECTURE_ARM 5 | 61 #define PROCESSOR_ARCHITECTURE_ARM 5 |
62 #define PROCESSOR_ARCHITECTURE_IA64 6 | 62 #define PROCESSOR_ARCHITECTURE_IA64 6 |
63 #define PROCESSOR_ARCHITECTURE_ALPHA64 7 | 63 #define PROCESSOR_ARCHITECTURE_ALPHA64 7 |
64 #define PROCESSOR_ARCHITECTURE_MSIL 8 | 64 #define PROCESSOR_ARCHITECTURE_MSIL 8 |
65 #define PROCESSOR_ARCHITECTURE_AMD64 9 | 65 #define PROCESSOR_ARCHITECTURE_AMD64 9 |
66 #define PROCESSOR_ARCHITECTURE_IA32_ON_WIN64 10 | 66 #define PROCESSOR_ARCHITECTURE_IA32_ON_WIN64 10 |
67 #define PROCESSOR_ARCHITECTURE_NEUTRAL 11 | 67 #define PROCESSOR_ARCHITECTURE_NEUTRAL 11 |
| 68 #define PROCESSOR_ARCHITECTURE_ARM64 12 |
| 69 #define PROCESSOR_ARCHITECTURE_ARM32_ON_WIN64 13 |
68 #define PROCESSOR_ARCHITECTURE_UNKNOWN 0xffff | 70 #define PROCESSOR_ARCHITECTURE_UNKNOWN 0xffff |
69 //! \} | 71 //! \} |
70 | 72 |
71 //! \anchor PF_x | 73 //! \anchor PF_x |
72 //! \name PF_* | 74 //! \name PF_* |
73 //! | 75 //! |
74 //! \brief CPU feature values for \ref CPU_INFORMATION::ProcessorFeatures | 76 //! \brief CPU feature values for \ref CPU_INFORMATION::ProcessorFeatures |
75 //! "CPU_INFORMATION::OtherCpuInfo::ProcessorFeatures". | 77 //! "CPU_INFORMATION::OtherCpuInfo::ProcessorFeatures". |
76 //! | 78 //! |
77 //! \{ | 79 //! \{ |
(...skipping 19 matching lines...) Expand all Loading... |
97 #define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19 | 99 #define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19 |
98 #define PF_SECOND_LEVEL_ADDRESS_TRANSLATION 20 | 100 #define PF_SECOND_LEVEL_ADDRESS_TRANSLATION 20 |
99 #define PF_VIRT_FIRMWARE_ENABLED 21 | 101 #define PF_VIRT_FIRMWARE_ENABLED 21 |
100 #define PF_RDWRFSGSBASE_AVAILABLE 22 | 102 #define PF_RDWRFSGSBASE_AVAILABLE 22 |
101 #define PF_FASTFAIL_AVAILABLE 23 | 103 #define PF_FASTFAIL_AVAILABLE 23 |
102 #define PF_ARM_DIVIDE_INSTRUCTION_AVAILABLE 24 | 104 #define PF_ARM_DIVIDE_INSTRUCTION_AVAILABLE 24 |
103 #define PF_ARM_64BIT_LOADSTORE_ATOMIC 25 | 105 #define PF_ARM_64BIT_LOADSTORE_ATOMIC 25 |
104 #define PF_ARM_EXTERNAL_CACHE_AVAILABLE 26 | 106 #define PF_ARM_EXTERNAL_CACHE_AVAILABLE 26 |
105 #define PF_ARM_FMAC_INSTRUCTIONS_AVAILABLE 27 | 107 #define PF_ARM_FMAC_INSTRUCTIONS_AVAILABLE 27 |
106 #define PF_RDRAND_INSTRUCTION_AVAILABLE 28 | 108 #define PF_RDRAND_INSTRUCTION_AVAILABLE 28 |
| 109 #define PF_ARM_V8_INSTRUCTIONS_AVAILABLE 29 |
| 110 #define PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE 30 |
| 111 #define PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE 31 |
| 112 #define PF_RDTSCP_INSTRUCTION_AVAILABLE 32 |
107 //! \} | 113 //! \} |
108 | 114 |
109 //! \anchor IMAGE_DEBUG_MISC_x | 115 //! \anchor IMAGE_DEBUG_MISC_x |
110 //! \name IMAGE_DEBUG_MISC_* | 116 //! \name IMAGE_DEBUG_MISC_* |
111 //! | 117 //! |
112 //! Data type values for IMAGE_DEBUG_MISC::DataType. | 118 //! Data type values for IMAGE_DEBUG_MISC::DataType. |
113 //! \{ | 119 //! \{ |
114 | 120 |
115 //! \brief A pointer to a `.dbg` file. | 121 //! \brief A pointer to a `.dbg` file. |
116 //! | 122 //! |
(...skipping 93 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
210 #define MEM_RESERVE 0x2000 | 216 #define MEM_RESERVE 0x2000 |
211 #define MEM_DECOMMIT 0x4000 | 217 #define MEM_DECOMMIT 0x4000 |
212 #define MEM_RELEASE 0x8000 | 218 #define MEM_RELEASE 0x8000 |
213 #define MEM_FREE 0x10000 | 219 #define MEM_FREE 0x10000 |
214 #define MEM_PRIVATE 0x20000 | 220 #define MEM_PRIVATE 0x20000 |
215 #define MEM_MAPPED 0x40000 | 221 #define MEM_MAPPED 0x40000 |
216 #define MEM_RESET 0x80000 | 222 #define MEM_RESET 0x80000 |
217 //! \} | 223 //! \} |
218 | 224 |
219 #endif // CRASHPAD_COMPAT_NON_WIN_WINNT_H_ | 225 #endif // CRASHPAD_COMPAT_NON_WIN_WINNT_H_ |
OLD | NEW |