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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 | 5 |
6 // Declares a Simulator for ARM instructions if we are not generating a native | 6 // Declares a Simulator for ARM instructions if we are not generating a native |
7 // ARM binary. This Simulator allows us to run and debug ARM code generation on | 7 // ARM binary. This Simulator allows us to run and debug ARM code generation on |
8 // regular desktop machines. | 8 // regular desktop machines. |
9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, | 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, |
10 // which will start execution in the Simulator or forwards to the real entry | 10 // which will start execution in the Simulator or forwards to the real entry |
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332 void DecodeTypeCP15(Instruction* instr); | 332 void DecodeTypeCP15(Instruction* instr); |
333 | 333 |
334 // Support for VFP. | 334 // Support for VFP. |
335 void DecodeTypeVFP(Instruction* instr); | 335 void DecodeTypeVFP(Instruction* instr); |
336 void DecodeType6CoprocessorIns(Instruction* instr); | 336 void DecodeType6CoprocessorIns(Instruction* instr); |
337 void DecodeSpecialCondition(Instruction* instr); | 337 void DecodeSpecialCondition(Instruction* instr); |
338 | 338 |
339 void DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(Instruction* instr); | 339 void DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(Instruction* instr); |
340 void DecodeVCMP(Instruction* instr); | 340 void DecodeVCMP(Instruction* instr); |
341 void DecodeVCVTBetweenDoubleAndSingle(Instruction* instr); | 341 void DecodeVCVTBetweenDoubleAndSingle(Instruction* instr); |
| 342 int32_t ConvertDoubleToInt(double val, bool unsigned_integer, |
| 343 VFPRoundingMode mode); |
342 void DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr); | 344 void DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr); |
343 | 345 |
344 // Executes one instruction. | 346 // Executes one instruction. |
345 void InstructionDecode(Instruction* instr); | 347 void InstructionDecode(Instruction* instr); |
346 | 348 |
347 // ICache. | 349 // ICache. |
348 static void CheckICache(base::CustomMatcherHashMap* i_cache, | 350 static void CheckICache(base::CustomMatcherHashMap* i_cache, |
349 Instruction* instr); | 351 Instruction* instr); |
350 static void FlushOnePage(base::CustomMatcherHashMap* i_cache, intptr_t start, | 352 static void FlushOnePage(base::CustomMatcherHashMap* i_cache, intptr_t start, |
351 int size); | 353 int size); |
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472 static inline void UnregisterCTryCatch(v8::internal::Isolate* isolate) { | 474 static inline void UnregisterCTryCatch(v8::internal::Isolate* isolate) { |
473 Simulator::current(isolate)->PopAddress(); | 475 Simulator::current(isolate)->PopAddress(); |
474 } | 476 } |
475 }; | 477 }; |
476 | 478 |
477 } // namespace internal | 479 } // namespace internal |
478 } // namespace v8 | 480 } // namespace v8 |
479 | 481 |
480 #endif // !defined(USE_SIMULATOR) | 482 #endif // !defined(USE_SIMULATOR) |
481 #endif // V8_ARM_SIMULATOR_ARM_H_ | 483 #endif // V8_ARM_SIMULATOR_ARM_H_ |
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