[Turbofan] Add ARM NEON instructions for implementing SIMD.

src/arm/macro-assembler-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <limits.h>  // For LONG_MIN, LONG_MAX.
 
 #if V8_TARGET_ARCH_ARM
 
 #include "src/base/bits.h"
 #include "src/base/division-by-constant.h"
@@ skipping 1063 matching lines @@
 void MacroAssembler::VmovLow(DwVfpRegister dst, Register src) {
   if (dst.code() < 16) {
     const LowDwVfpRegister loc = LowDwVfpRegister::from_code(dst.code());
     vmov(loc.low(), src);
   } else {
     vmov(dst, VmovIndexLo, src);
   }
 }
 
 void MacroAssembler::VmovExtended(Register dst, int src_code) {
-  DCHECK_LE(32, src_code);
-  DCHECK_GT(64, src_code);
+  DCHECK_LE(SwVfpRegister::kMaxNumRegisters, src_code);
+  DCHECK_GT(SwVfpRegister::kMaxNumRegisters * 2, src_code);
   if (src_code & 0x1) {
     VmovHigh(dst, DwVfpRegister::from_code(src_code / 2));
   } else {
     VmovLow(dst, DwVfpRegister::from_code(src_code / 2));
   }
 }
 
 void MacroAssembler::VmovExtended(int dst_code, Register src) {
-  DCHECK_LE(32, dst_code);
-  DCHECK_GT(64, dst_code);
+  DCHECK_LE(SwVfpRegister::kMaxNumRegisters, dst_code);
+  DCHECK_GT(SwVfpRegister::kMaxNumRegisters * 2, dst_code);
   if (dst_code & 0x1) {
     VmovHigh(DwVfpRegister::from_code(dst_code / 2), src);
   } else {
     VmovLow(DwVfpRegister::from_code(dst_code / 2), src);
   }
 }
 
 void MacroAssembler::VmovExtended(int dst_code, int src_code,
                                   Register scratch) {
-  if (src_code < 32 && dst_code < 32) {
+  if (src_code < SwVfpRegister::kMaxNumRegisters &&
+      dst_code < SwVfpRegister::kMaxNumRegisters) {
     // src and dst are both s-registers.
     vmov(SwVfpRegister::from_code(dst_code),
          SwVfpRegister::from_code(src_code));
-  } else if (src_code < 32) {
+  } else if (src_code < SwVfpRegister::kMaxNumRegisters) {
     // src is an s-register.
     vmov(scratch, SwVfpRegister::from_code(src_code));
     VmovExtended(dst_code, scratch);
-  } else if (dst_code < 32) {
+  } else if (dst_code < SwVfpRegister::kMaxNumRegisters) {
     // dst is an s-register.
     VmovExtended(scratch, src_code);
     vmov(SwVfpRegister::from_code(dst_code), scratch);
   } else {
     // Neither src or dst are s-registers.
-    DCHECK_GT(64, src_code);
-    DCHECK_GT(64, dst_code);
+    DCHECK_GT(SwVfpRegister::kMaxNumRegisters * 2, src_code);
+    DCHECK_GT(SwVfpRegister::kMaxNumRegisters * 2, dst_code);
     VmovExtended(scratch, src_code);
     VmovExtended(dst_code, scratch);
   }
 }
 
 void MacroAssembler::VmovExtended(int dst_code, const MemOperand& src,
                                   Register scratch) {
-  if (dst_code >= 32) {
+  if (dst_code >= SwVfpRegister::kMaxNumRegisters) {
     ldr(scratch, src);
     VmovExtended(dst_code, scratch);
   } else {
     vldr(SwVfpRegister::from_code(dst_code), src);
   }
 }
 
 void MacroAssembler::VmovExtended(const MemOperand& dst, int src_code,
                                   Register scratch) {
-  if (src_code >= 32) {
+  if (src_code >= SwVfpRegister::kMaxNumRegisters) {
     VmovExtended(scratch, src_code);
     str(scratch, dst);
   } else {
     vstr(SwVfpRegister::from_code(src_code), dst);
   }
 }
 
+void MacroAssembler::ExtractLane(Register dst, QwNeonRegister src,

[Rodolph Perfetta (ARM), 2016/12/08 18:08:28]

There is a Neon instruction for this: vmov.dt rt, Dn[x] where dt is one of {S8,
U8, S16, U16, 32} and x the index of your lane.

A partial implementation of this function is already available: vmov(const
DwVfpRegister dst, const VmovIndex index, const Register src, const Condition
cond), it only supports VFP, i.e vmov.32 rt, Dn[0|1]

[bbudge, 2016/12/10 21:33:04]

Awesome, I've implemented this for the other data types.

+                                 NeonDataType dt, int lane) {
+  // Read the word containing the lane into dst.
+  int bytes_per_lane = dt & NeonDataTypeSizeMask;
+  int byte = (lane * bytes_per_lane);
+  int word = byte / kPointerSize;
+  int s_code = src.code() * 4 + word;
+  if (s_code < SwVfpRegister::kMaxNumRegisters) {
+    vmov(dst, SwVfpRegister::from_code(s_code));
+  } else {
+    VmovExtended(dst, s_code);
+  }
+  if (bytes_per_lane != kPointerSize) {
+    // Extract lane, and sign extend for signed types.
+    int width = bytes_per_lane * kBitsPerByte;
+    int lsb = (byte & 0x3) * kBitsPerByte;
+    if ((dt & NeonDataTypeUMask) != 0) {
+      Ubfx(dst, dst, lsb, width);
+    } else {
+      Sbfx(dst, dst, lsb, width);
+    }
+  }
+}
+
+void MacroAssembler::ExtractLane(SwVfpRegister dst, QwNeonRegister src,
+                                 Register scratch, int lane) {
+  int s_code = src.code() * 4 + lane;
+  VmovExtended(dst.code(), s_code, scratch);
+}
+
+void MacroAssembler::ReplaceLane(QwNeonRegister dst, QwNeonRegister src,
+                                 Register src_lane, Register scratch,
+                                 NeonDataType dt, int lane) {
+  Move(dst, src);
+  int bytes_per_lane = dt & NeonDataTypeSizeMask;

[Rodolph Perfetta (ARM), 2016/12/08 18:08:28]

if you implement vmov.dt Dn[x], Rt then you can drop the rest of this function:

  Move(dst, src);
  vmov(dt, dst, src_lane, lane);

the VFP only part of this instruction is already available: void 
Assembler::vmov(const Register dst, const VmovIndex index, const DwVfpRegister
src, const Condition cond).

The VFP part support conditional execution, usually Neon deprecates it so it may
be worth removing the condition argument for this instruction

[bbudge, 2016/12/10 21:33:04]

I implemented the Neon form of this instruction too. I allow the conditional
form since the documentation doesn't seem to forbid it.

+  int byte = (lane * bytes_per_lane);
+  int word = byte / kPointerSize;
+  int s_code = dst.code() * 4 + word;
+  // If lane is word sized, just move src_lane into the containing s-register.
+  if (bytes_per_lane == kPointerSize) {
+    if (s_code < SwVfpRegister::kMaxNumRegisters) {
+      vmov(SwVfpRegister::from_code(s_code), src_lane);
+    } else {
+      VmovExtended(s_code, src_lane);
+    }
+    return;
+  }
+  // Move the s-register containing the lane to replace into scratch register.
+  if (s_code < SwVfpRegister::kMaxNumRegisters) {
+    vmov(scratch, SwVfpRegister::from_code(s_code));
+  } else {
+    VmovExtended(scratch, s_code);
+  }
+  // Combine scratch with src_lane, shifted into position.
+  int width = bytes_per_lane * kBitsPerByte;
+  int lsb = (byte % kPointerSize) * kBitsPerByte;
+  bfi(scratch, src_lane, lsb, width);
+  if (s_code < SwVfpRegister::kMaxNumRegisters) {
+    vmov(SwVfpRegister::from_code(s_code), scratch);
+  } else {
+    VmovExtended(s_code, scratch);
+  }
+}
+
+void MacroAssembler::ReplaceLane(QwNeonRegister dst, QwNeonRegister src,
+                                 SwVfpRegister src_lane, Register scratch,
+                                 int lane) {
+  Move(dst, src);
+  int s_code = dst.code() * 4 + lane;
+  VmovExtended(s_code, src_lane.code(), scratch);
+}
+
 void MacroAssembler::LslPair(Register dst_low, Register dst_high,
                              Register src_low, Register src_high,
                              Register scratch, Register shift) {
   DCHECK(!AreAliased(dst_high, src_low));
   DCHECK(!AreAliased(dst_high, shift));
 
   Label less_than_32;
   Label done;
   rsb(scratch, shift, Operand(32), SetCC);
   b(gt, &less_than_32);
@@ skipping 2735 matching lines @@
     }
   }
   if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift));
   add(result, result, Operand(dividend, LSR, 31));
 }
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_ARM