More stubs and instructions for arm64.

runtime/vm/simulator_arm64.cc

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include <math.h>  // for isnan.
 #include <setjmp.h>
 #include <stdlib.h>
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM64)
@@ skipping 878 matching lines @@
   const Register rn = instr->RnField();
   const uint32_t imm = (instr->Bit(22) == 1) ? (instr->Imm12Field() << 12)
                                              : (instr->Imm12Field());
   if (instr->SFField()) {
     // 64-bit add.
     const int64_t rn_val = get_register(rn, instr->RnMode());
     const int64_t alu_out = addition ? (rn_val + imm) : (rn_val - imm);
     set_register(rd, alu_out, instr->RdMode());
     if (instr->HasS()) {
       SetNZFlagsX(alu_out);
-      SetCFlag(CarryFromX(rn_val, imm));
+      if (addition) {
+        SetCFlag(CarryFromX(rn_val, imm));
+      } else {
+        SetCFlag(!BorrowFromX(rn_val, imm));
+      }
       SetVFlag(OverflowFromX(alu_out, rn_val, imm, addition));
     }
   } else {
     // 32-bit add.
     const int32_t rn_val = get_wregister(rn, instr->RnMode());
     const int32_t alu_out = addition ? (rn_val + imm) : (rn_val - imm);
     set_wregister(rd, alu_out, instr->RdMode());
     if (instr->HasS()) {
       SetNZFlagsW(alu_out);
-      SetCFlag(CarryFromW(rn_val, imm));
+      if (addition) {
+        SetCFlag(CarryFromW(rn_val, imm));
+      } else {
+        SetCFlag(!BorrowFromW(rn_val, imm));
+      }
       SetVFlag(OverflowFromW(alu_out, rn_val, imm, addition));
     }
   }
 }
 
 
 void Simulator::DecodeLogicalImm(Instr* instr) {
   const int op = instr->Bits(29, 2);
   const bool set_flags = op == 3;
   const int out_size = ((instr->SFField() == 0) && (instr->NField() == 0))
@@ skipping 675 matching lines @@
     const int64_t rn_val = get_register(rn, instr->RnMode());
     int64_t alu_out = 0;
     if (subtract) {
       alu_out = rn_val - rm_val;
     } else {
       alu_out = rn_val + rm_val;
     }
     set_register(rd, alu_out, instr->RdMode());
     if (instr->HasS()) {
       SetNZFlagsX(alu_out);
-      SetCFlag(CarryFromX(rn_val, rm_val));
+      if (subtract) {
+        SetCFlag(!BorrowFromX(rn_val, rm_val));
+      } else {
+        SetCFlag(CarryFromX(rn_val, rm_val));
+      }
       SetVFlag(OverflowFromX(alu_out, rn_val, rm_val, !subtract));
     }
   } else {
     // 32-bit add.
     const int32_t rn_val = get_wregister(rn, instr->RnMode());
     const int32_t rm_val32 = static_cast<int32_t>(rm_val & kWRegMask);
     int32_t alu_out = 0;
     if (subtract) {
       alu_out = rn_val - rm_val32;
     } else {
       alu_out = rn_val + rm_val32;
     }
     set_wregister(rd, alu_out, instr->RdMode());
     if (instr->HasS()) {
       SetNZFlagsW(alu_out);
-      SetCFlag(CarryFromW(rn_val, rm_val32));
+      if (subtract) {
+        SetCFlag(!BorrowFromW(rn_val, rm_val32));
+      } else {
+        SetCFlag(CarryFromW(rn_val, rm_val32));
+      }
       SetVFlag(OverflowFromW(alu_out, rn_val, rm_val32, !subtract));
     }
   }
 }
 
 
 void Simulator::DecodeLogicalShift(Instr* instr) {
   const int op = (instr->Bits(29, 2) << 1) | instr->Bit(21);
   const Register rd = instr->RdField();
   const Register rn = instr->RnField();
@@ skipping 415 matching lines @@
   int64_t return_value;
   return_value = get_register(R0);
   return return_value;
 }
 
 }  // namespace dart
 
 #endif  // !defined(HOST_ARCH_ARM64)
 
 #endif  // defined TARGET_ARCH_ARM64