Index: src/mips/assembler-mips.cc |
diff --git a/src/mips/assembler-mips.cc b/src/mips/assembler-mips.cc |
index 865e64c87d26fabb81a7511d774d1fb9b8440c60..fb47ef4a1599cee65f9a57a16485379540c3048b 100644 |
--- a/src/mips/assembler-mips.cc |
+++ b/src/mips/assembler-mips.cc |
@@ -1937,6 +1937,7 @@ void Assembler::lui(Register rd, int32_t j) { |
void Assembler::aui(Register rt, Register rs, int32_t j) { |
// This instruction uses same opcode as 'lui'. The difference in encoding is |
// 'lui' has zero reg. for rs field. |
+ DCHECK(IsMipsArchVariant(kMips32r6)); |
DCHECK(!(rs.is(zero_reg))); |
DCHECK(is_uint16(j)); |
GenInstrImmediate(LUI, rs, rt, j); |
@@ -3200,6 +3201,11 @@ Address Assembler::target_address_at(Address pc) { |
GetImmediate16(instr2)); |
} |
+ if (IsLui(instr1) && IsJicOrJialc(instr2)) { |
+ // Assemble the 32 bit value. |
ivica.bogosavljevic
2016/12/12 13:29:39
You already checked IsLui in the previous if state
|
+ return reinterpret_cast<Address>(CreateTargetAddress(instr1, instr2)); |
+ } |
+ |
// We should never get here, force a bad address if we do. |
UNREACHABLE(); |
return (Address)0x0; |