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Side by Side Diff: src/mips/assembler-mips-inl.h

Issue 2542403002: MIPS: Use JIC/JIALC offset when possible (Closed)
Patch Set: Fix deserialization problem, rebase to master Created 3 years, 8 months ago
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1 1
2 // Copyright (c) 1994-2006 Sun Microsystems Inc. 2 // Copyright (c) 1994-2006 Sun Microsystems Inc.
3 // All Rights Reserved. 3 // All Rights Reserved.
4 // 4 //
5 // Redistribution and use in source and binary forms, with or without 5 // Redistribution and use in source and binary forms, with or without
6 // modification, are permitted provided that the following conditions are 6 // modification, are permitted provided that the following conditions are
7 // met: 7 // met:
8 // 8 //
9 // - Redistributions of source code must retain the above copyright notice, 9 // - Redistributions of source code must retain the above copyright notice,
10 // this list of conditions and the following disclaimer. 10 // this list of conditions and the following disclaimer.
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114 // output before the next target. 114 // output before the next target.
115 // For an instruction like LUI/ORI where the target bits are mixed into the 115 // For an instruction like LUI/ORI where the target bits are mixed into the
116 // instruction bits, the size of the target will be zero, indicating that the 116 // instruction bits, the size of the target will be zero, indicating that the
117 // serializer should not step forward in memory after a target is resolved 117 // serializer should not step forward in memory after a target is resolved
118 // and written. In this case the target_address_address function should 118 // and written. In this case the target_address_address function should
119 // return the end of the instructions to be patched, allowing the 119 // return the end of the instructions to be patched, allowing the
120 // deserializer to deserialize the instructions as raw bytes and put them in 120 // deserializer to deserialize the instructions as raw bytes and put them in
121 // place, ready to be patched with the target. After jump optimization, 121 // place, ready to be patched with the target. After jump optimization,
122 // that is the address of the instruction that follows J/JAL/JR/JALR 122 // that is the address of the instruction that follows J/JAL/JR/JALR
123 // instruction. 123 // instruction.
124 return reinterpret_cast<Address>( 124 if (IsMipsArchVariant(kMips32r6)) {
125 pc_ + Assembler::kInstructionsFor32BitConstant * Assembler::kInstrSize); 125 // On R6 we don't move to the end of the instructions to be patched, but one
126 // instruction before, because if these instructions are at the end of the
127 // code object it can cause errors in the deserializer.
128 return reinterpret_cast<Address>(
129 pc_ +
130 (Assembler::kInstructionsFor32BitConstant - 1) * Assembler::kInstrSize);
131 } else {
132 return reinterpret_cast<Address>(
133 pc_ + Assembler::kInstructionsFor32BitConstant * Assembler::kInstrSize);
134 }
126 } 135 }
127 136
128 137
129 Address RelocInfo::constant_pool_entry_address() { 138 Address RelocInfo::constant_pool_entry_address() {
130 UNREACHABLE(); 139 UNREACHABLE();
131 return NULL; 140 return NULL;
132 } 141 }
133 142
134 143
135 int RelocInfo::target_address_size() { 144 int RelocInfo::target_address_size() {
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478 CheckBuffer(); 487 CheckBuffer();
479 } 488 }
480 EmitHelper(x, is_compact_branch); 489 EmitHelper(x, is_compact_branch);
481 } 490 }
482 491
483 492
484 } // namespace internal 493 } // namespace internal
485 } // namespace v8 494 } // namespace v8
486 495
487 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_ 496 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_
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