Enables all startup code for arm64.

runtime/vm/assembler_arm64.cc

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM64)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/longjump.h"
@@ skipping 30 matching lines @@
     // Not adding Object::null() to the index table. It is at index 0 in the
     // object pool, but the HashMap uses 0 to indicate not found.
 
     object_pool_.Add(Bool::True(), Heap::kOld);
     patchable_pool_entries_.Add(kNotPatchable);
     object_pool_index_table_.Insert(ObjIndexPair(Bool::True().raw(), 1));
 
     object_pool_.Add(Bool::False(), Heap::kOld);
     patchable_pool_entries_.Add(kNotPatchable);
     object_pool_index_table_.Insert(ObjIndexPair(Bool::False().raw(), 2));
+
+    if (StubCode::UpdateStoreBuffer_entry() != NULL) {
+      FindExternalLabel(&StubCode::UpdateStoreBufferLabel(), kNotPatchable);
+    } else {
+      object_pool_.Add(Object::null_object(), Heap::kOld);
+      patchable_pool_entries_.Add(kNotPatchable);
+    }
+
+    if (StubCode::CallToRuntime_entry() != NULL) {
+      FindExternalLabel(&StubCode::CallToRuntimeLabel(), kNotPatchable);
+    } else {
+      object_pool_.Add(Object::null_object(), Heap::kOld);
+      patchable_pool_entries_.Add(kNotPatchable);
+    }
+
+    // Create fixed object pool entry for debugger stub.
+    if (StubCode::BreakpointRuntime_entry() != NULL) {
+      intptr_t index =
+          FindExternalLabel(&StubCode::BreakpointRuntimeLabel(), kNotPatchable);
+      ASSERT(index == kBreakpointRuntimeCPIndex);
+    } else {
+      object_pool_.Add(Object::null_object(), Heap::kOld);
+      patchable_pool_entries_.Add(kNotPatchable);
+    }
   }
 }
 
 
 void Assembler::InitializeMemoryWithBreakpoints(uword data, intptr_t length) {
   ASSERT(Utils::IsAligned(data, 4));
   ASSERT(Utils::IsAligned(length, 4));
   const uword end = data + length;
   while (data < end) {
     *reinterpret_cast<int32_t*>(data) = Instr::kBreakPointInstruction;
@@ skipping 608 matching lines @@
                                          const Address& dest,
                                          const Object& value) {
   ASSERT(value.IsSmi() || value.InVMHeap() ||
          (value.IsOld() && value.IsNotTemporaryScopedHandle()));
   // No store buffer update.
   LoadObject(TMP, value, PP);
   str(TMP, dest);
 }
 
 
+void Assembler::LoadClassId(Register result, Register object) {
+  ASSERT(RawObject::kClassIdTagBit == 16);
+  ASSERT(RawObject::kClassIdTagSize == 16);
+  const intptr_t class_id_offset = Object::tags_offset() +
+      RawObject::kClassIdTagBit / kBitsPerByte;
+  LoadFromOffset(result, object, class_id_offset - kHeapObjectTag,
+                 kUnsignedHalfword);
+}
+
+
+void Assembler::LoadClassById(Register result, Register class_id) {
+  ASSERT(result != class_id);
+  LoadFieldFromOffset(result, CTX, Context::isolate_offset());
+  const intptr_t table_offset_in_isolate =
+      Isolate::class_table_offset() + ClassTable::table_offset();
+  LoadFromOffset(result, result, table_offset_in_isolate);
+  ldr(result, Address(result, class_id, UXTX, Address::Scaled));
+}
+
+
+void Assembler::LoadClass(Register result, Register object) {
+  ASSERT(object != TMP);
+  LoadClassId(TMP, object);
+  LoadClassById(result, TMP);
+}
+
+
+void Assembler::CompareClassId(Register object,
+                               intptr_t class_id) {
+  LoadClassId(TMP, object);
+  CompareImmediate(TMP, class_id, PP);
+}
+
+
 // Frame entry and exit.
 void Assembler::ReserveAlignedFrameSpace(intptr_t frame_space) {
   // Reserve space for arguments and align frame before entering
   // the C++ world.
   AddImmediate(SP, SP, -frame_space, kNoRegister);
   if (OS::ActivationFrameAlignment() > 1) {
     mov(TMP, SP);  // SP can't be register operand of andi.
     andi(TMP, TMP, ~(OS::ActivationFrameAlignment() - 1));
     mov(SP, TMP);
   }
@@ skipping 13 matching lines @@
 
 void Assembler::LeaveFrame() {
   mov(SP, FP);
   Pop(FP);
   Pop(LR);
 }
 
 
 void Assembler::EnterDartFrame(intptr_t frame_size) {
   // Setup the frame.
-  adr(TMP, 0);  // TMP gets PC of this instruction.
+  adr(TMP, -CodeSize());  // TMP gets PC marker.
   EnterFrame(0);
   Push(TMP);  // Save PC Marker.
   TagAndPushPP();  // Save PP.
 
   // Load the pool pointer.
   LoadPoolPointer(PP);
 
   // Reserve space.
   if (frame_size > 0) {
-    sub(SP, SP, Operand(frame_size));
+    AddImmediate(SP, SP, -frame_size, PP);
   }
 }
 
 
 void Assembler::EnterDartFrameWithInfo(intptr_t frame_size, Register new_pp) {
   // Setup the frame.
-  adr(TMP, 0);  // TMP gets PC of this instruction.
+  adr(TMP, -CodeSize());  // TMP gets PC marker.
   EnterFrame(0);
   Push(TMP);  // Save PC Marker.
   TagAndPushPP();  // Save PP.
 
   // Load the pool pointer.
   if (new_pp == kNoRegister) {
     LoadPoolPointer(PP);
   } else {
     mov(PP, new_pp);
   }
 
   // Reserve space.
   if (frame_size > 0) {
-    sub(SP, SP, Operand(frame_size));
+    AddImmediate(SP, SP, -frame_size, PP);
   }
 }
 
 
 // On entry to a function compiled for OSR, the caller's frame pointer, the
 // stack locals, and any copied parameters are already in place.  The frame
 // pointer is already set up.  The PC marker is not correct for the
 // optimized function and there may be extra space for spill slots to
 // allocate. We must also set up the pool pointer for the function.
 void Assembler::EnterOsrFrame(intptr_t extra_size, Register new_pp) {
   const intptr_t offset = CodeSize();
 
   Comment("EnterOsrFrame");
-  adr(TMP, 0);
+  adr(TMP, -CodeSize());
 
   AddImmediate(TMP, TMP, -offset, kNoRegister);
   StoreToOffset(TMP, FP, kPcMarkerSlotFromFp * kWordSize);
 
   // Setup pool pointer for this dart function.
   if (new_pp == kNoRegister) {
     LoadPoolPointer(PP);
   } else {
     mov(PP, new_pp);
   }
 
   if (extra_size > 0) {
-    sub(SP, SP, Operand(extra_size));
+    AddImmediate(SP, SP, -extra_size, PP);
   }
 }
 
 
 void Assembler::LeaveDartFrame() {
   // Restore and untag PP.
   LoadFromOffset(PP, FP, kSavedCallerPpSlotFromFp * kWordSize);
   sub(PP, PP, Operand(kHeapObjectTag));
   LeaveFrame();
 }
 
 
 void Assembler::EnterCallRuntimeFrame(intptr_t frame_size) {
   EnterFrame(0);
 
   // TODO(zra): also save volatile FPU registers.
 
   for (int i = kDartFirstVolatileCpuReg; i <= kDartLastVolatileCpuReg; i++) {
     const Register reg = static_cast<Register>(i);
-    Push(reg);
+    if ((reg != R16) && (reg != R17)) {
+      Push(reg);
+    }
   }
 
   ReserveAlignedFrameSpace(frame_size);
 }
 
 
 void Assembler::LeaveCallRuntimeFrame() {
   // SP might have been modified to reserve space for arguments
   // and ensure proper alignment of the stack frame.
   // We need to restore it before restoring registers.
   // TODO(zra): Also include FPU regs in this count once they are added.
   const intptr_t kPushedRegistersSize =
       kDartVolatileCpuRegCount * kWordSize;
   AddImmediate(SP, FP, -kPushedRegistersSize, PP);
   for (int i = kDartLastVolatileCpuReg; i >= kDartFirstVolatileCpuReg; i--) {
     const Register reg = static_cast<Register>(i);
-    Pop(reg);
+    if ((reg != R16) && (reg != R17)) {
+      Pop(reg);
+    }
   }
 
   Pop(FP);
   Pop(LR);
 }
 
 
 void Assembler::CallRuntime(const RuntimeEntry& entry,
                             intptr_t argument_count) {
   entry.Call(this, argument_count);
@@ skipping 13 matching lines @@
 void Assembler::LeaveStubFrame() {
   // Restore and untag PP.
   LoadFromOffset(PP, FP, kSavedCallerPpSlotFromFp * kWordSize);
   sub(PP, PP, Operand(kHeapObjectTag));
   LeaveFrame();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM64