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Side by Side Diff: runtime/vm/disassembler_arm64.cc

Issue 253623003: Enables all startup code for arm64. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 8 months ago
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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/disassembler.h" 5 #include "vm/disassembler.h"
6 6
7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM64. 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM64.
8 #if defined(TARGET_ARCH_ARM64) 8 #if defined(TARGET_ARCH_ARM64)
9 #include "platform/assert.h" 9 #include "platform/assert.h"
10 10
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119 // These condition names are defined in a way to match the native disassembler 119 // These condition names are defined in a way to match the native disassembler
120 // formatting. See for example the command "objdump -d <binary file>". 120 // formatting. See for example the command "objdump -d <binary file>".
121 static const char* cond_names[kMaxCondition] = { 121 static const char* cond_names[kMaxCondition] = {
122 "eq", "ne", "cs" , "cc" , "mi" , "pl" , "vs" , "vc" , 122 "eq", "ne", "cs" , "cc" , "mi" , "pl" , "vs" , "vc" ,
123 "hi", "ls", "ge", "lt", "gt", "le", "", "invalid", 123 "hi", "ls", "ge", "lt", "gt", "le", "", "invalid",
124 }; 124 };
125 125
126 126
127 // Print the condition guarding the instruction. 127 // Print the condition guarding the instruction.
128 void ARM64Decoder::PrintCondition(Instr* instr) { 128 void ARM64Decoder::PrintCondition(Instr* instr) {
129 Print(cond_names[instr->ConditionField()]); 129 if (instr->IsConditionalSelectOp()) {
130 Print(cond_names[instr->SelectConditionField()]);
131 } else {
132 Print(cond_names[instr->ConditionField()]);
133 }
130 } 134 }
131 135
132 136
133 // Print the register shift operands for the instruction. Generally used for 137 // Print the register shift operands for the instruction. Generally used for
134 // data processing instructions. 138 // data processing instructions.
135 void ARM64Decoder::PrintShiftExtendRm(Instr* instr) { 139 void ARM64Decoder::PrintShiftExtendRm(Instr* instr) {
136 int rm = instr->RmField(); 140 int rm = instr->RmField();
137 Shift shift = instr->ShiftTypeField(); 141 Shift shift = instr->ShiftTypeField();
138 int shift_amount = instr->ShiftAmountField(); 142 int shift_amount = instr->ShiftAmountField();
139 Extend extend = instr->ExtendTypeField(); 143 Extend extend = instr->ExtendTypeField();
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837 Format(instr, "mul'sf, 'rd, 'rn, 'rm"); 841 Format(instr, "mul'sf, 'rd, 'rn, 'rm");
838 } else { 842 } else {
839 Format(instr, "madd'sf 'rd, 'rn, 'rm, 'ra"); 843 Format(instr, "madd'sf 'rd, 'rn, 'rm, 'ra");
840 } 844 }
841 } else { 845 } else {
842 Unknown(instr); 846 Unknown(instr);
843 } 847 }
844 } 848 }
845 849
846 850
851 void ARM64Decoder::DecodeConditionalSelect(Instr* instr) {
852 if ((instr->Bits(29, 2) == 0) && (instr->Bits(10, 2) == 0)) {
853 Format(instr, "mov'sf'cond 'rd, 'rn, 'rm");
854 } else {
855 Unknown(instr);
856 }
857 }
858
859
847 void ARM64Decoder::DecodeDPRegister(Instr* instr) { 860 void ARM64Decoder::DecodeDPRegister(Instr* instr) {
848 if (instr->IsAddSubShiftExtOp()) { 861 if (instr->IsAddSubShiftExtOp()) {
849 DecodeAddSubShiftExt(instr); 862 DecodeAddSubShiftExt(instr);
850 } else if (instr->IsLogicalShiftOp()) { 863 } else if (instr->IsLogicalShiftOp()) {
851 DecodeLogicalShift(instr); 864 DecodeLogicalShift(instr);
852 } else if (instr->IsMiscDP2SourceOp()) { 865 } else if (instr->IsMiscDP2SourceOp()) {
853 DecodeMiscDP2Source(instr); 866 DecodeMiscDP2Source(instr);
854 } else if (instr->IsMiscDP3SourceOp()) { 867 } else if (instr->IsMiscDP3SourceOp()) {
855 DecodeMiscDP3Source(instr); 868 DecodeMiscDP3Source(instr);
869 } else if (instr->IsConditionalSelectOp()) {
870 DecodeConditionalSelect(instr);
856 } else { 871 } else {
857 Unknown(instr); 872 Unknown(instr);
858 } 873 }
859 } 874 }
860 875
861 876
862 void ARM64Decoder::DecodeDPSimd1(Instr* instr) { 877 void ARM64Decoder::DecodeDPSimd1(Instr* instr) {
863 Unknown(instr); 878 Unknown(instr);
864 } 879 }
865 880
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931 human_buffer, 946 human_buffer,
932 sizeof(human_buffer), 947 sizeof(human_buffer),
933 pc); 948 pc);
934 pc += instruction_length; 949 pc += instruction_length;
935 } 950 }
936 } 951 }
937 952
938 } // namespace dart 953 } // namespace dart
939 954
940 #endif // defined TARGET_ARCH_ARM 955 #endif // defined TARGET_ARCH_ARM
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