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1 // Copyright 2015 the V8 project authors. All rights reserved. | 1 // Copyright 2015 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" |
6 | 6 |
7 #include "src/compilation-info.h" | 7 #include "src/compilation-info.h" |
8 #include "src/compiler/code-generator-impl.h" | 8 #include "src/compiler/code-generator-impl.h" |
9 #include "src/compiler/gap-resolver.h" | 9 #include "src/compiler/gap-resolver.h" |
10 #include "src/compiler/node-matchers.h" | 10 #include "src/compiler/node-matchers.h" |
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112 | 112 |
113 MemOperand SlotToMemOperand(int slot) const { | 113 MemOperand SlotToMemOperand(int slot) const { |
114 FrameOffset offset = frame_access_state()->GetFrameOffset(slot); | 114 FrameOffset offset = frame_access_state()->GetFrameOffset(slot); |
115 return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset()); | 115 return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset()); |
116 } | 116 } |
117 | 117 |
118 MemOperand InputStackSlot(size_t index) { | 118 MemOperand InputStackSlot(size_t index) { |
119 InstructionOperand* op = instr_->InputAt(index); | 119 InstructionOperand* op = instr_->InputAt(index); |
120 return SlotToMemOperand(AllocatedOperand::cast(op)->index()); | 120 return SlotToMemOperand(AllocatedOperand::cast(op)->index()); |
121 } | 121 } |
| 122 |
| 123 MemOperand InputStackSlot32(size_t index) { |
| 124 #if V8_TARGET_ARCH_S390X && !V8_TARGET_LITTLE_ENDIAN |
| 125 // We want to read the 32-bits directly from memory |
| 126 MemOperand mem = InputStackSlot(index); |
| 127 return MemOperand(mem.rb(), mem.rx(), mem.offset() + 4); |
| 128 #else |
| 129 return InputStackSlot(index); |
| 130 #endif |
| 131 } |
122 }; | 132 }; |
123 | 133 |
124 static inline bool HasRegisterInput(Instruction* instr, int index) { | 134 static inline bool HasRegisterInput(Instruction* instr, int index) { |
125 return instr->InputAt(index)->IsRegister(); | 135 return instr->InputAt(index)->IsRegister(); |
126 } | 136 } |
127 | 137 |
128 static inline bool HasImmediateInput(Instruction* instr, size_t index) { | 138 static inline bool HasImmediateInput(Instruction* instr, size_t index) { |
129 return instr->InputAt(index)->IsImmediate(); | 139 return instr->InputAt(index)->IsImmediate(); |
130 } | 140 } |
131 | 141 |
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328 } \ | 338 } \ |
329 } else { \ | 339 } else { \ |
330 if (i.CompareLogical()) { \ | 340 if (i.CompareLogical()) { \ |
331 __ cmpl_instr(i.InputRegister(0), i.InputImmediate(1)); \ | 341 __ cmpl_instr(i.InputRegister(0), i.InputImmediate(1)); \ |
332 } else { \ | 342 } else { \ |
333 __ cmp_instr(i.InputRegister(0), i.InputImmediate(1)); \ | 343 __ cmp_instr(i.InputRegister(0), i.InputImmediate(1)); \ |
334 } \ | 344 } \ |
335 } \ | 345 } \ |
336 } while (0) | 346 } while (0) |
337 | 347 |
338 #define ASSEMBLE_FLOAT_COMPARE(cmp_instr) \ | 348 #define ASSEMBLE_FLOAT_COMPARE(cmp_instr) \ |
339 do { \ | 349 do { \ |
340 __ cmp_instr(i.InputDoubleRegister(0), i.InputDoubleRegister(1); \ | 350 __ cmp_instr(i.InputDoubleRegister(0), i.InputDoubleRegister(1)); \ |
341 } while (0) | 351 } while (0) |
342 | 352 |
343 // Divide instruction dr will implicity use register pair | 353 // Divide instruction dr will implicity use register pair |
344 // r0 & r1 below. | 354 // r0 & r1 below. |
345 // R0:R1 = R1 / divisor - R0 remainder | 355 // R0:R1 = R1 / divisor - R0 remainder |
346 // Copy remainder to output reg | 356 // Copy remainder to output reg |
347 #define ASSEMBLE_MODULO(div_instr, shift_instr) \ | 357 #define ASSEMBLE_MODULO(div_instr, shift_instr) \ |
348 do { \ | 358 do { \ |
349 __ LoadRR(r0, i.InputRegister(0)); \ | 359 __ LoadRR(r0, i.InputRegister(0)); \ |
350 __ shift_instr(r0, Operand(32)); \ | 360 __ shift_instr(r0, Operand(32)); \ |
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1350 } | 1360 } |
1351 __ sdbr(i.OutputDoubleRegister(), i.InputDoubleRegister(1)); | 1361 __ sdbr(i.OutputDoubleRegister(), i.InputDoubleRegister(1)); |
1352 } | 1362 } |
1353 break; | 1363 break; |
1354 case kS390_Mul32: | 1364 case kS390_Mul32: |
1355 if (HasRegisterInput(instr, 1)) { | 1365 if (HasRegisterInput(instr, 1)) { |
1356 __ Mul32(i.InputRegister(0), i.InputRegister(1)); | 1366 __ Mul32(i.InputRegister(0), i.InputRegister(1)); |
1357 } else if (HasImmediateInput(instr, 1)) { | 1367 } else if (HasImmediateInput(instr, 1)) { |
1358 __ Mul32(i.InputRegister(0), i.InputImmediate(1)); | 1368 __ Mul32(i.InputRegister(0), i.InputImmediate(1)); |
1359 } else if (HasStackSlotInput(instr, 1)) { | 1369 } else if (HasStackSlotInput(instr, 1)) { |
1360 #ifdef V8_TARGET_ARCH_S390X | 1370 __ Mul32(i.InputRegister(0), i.InputStackSlot32(1)); |
1361 // Avoid endian-issue here: | |
1362 // stg r1, 0(fp) | |
1363 // ... | |
1364 // msy r2, 0(fp) <-- This will read the upper 32 bits | |
1365 __ lg(kScratchReg, i.InputStackSlot(1)); | |
1366 __ Mul32(i.InputRegister(0), kScratchReg); | |
1367 #else | |
1368 __ Mul32(i.InputRegister(0), i.InputStackSlot(1)); | |
1369 #endif | |
1370 } else { | 1371 } else { |
1371 UNIMPLEMENTED(); | 1372 UNIMPLEMENTED(); |
1372 } | 1373 } |
1373 break; | 1374 break; |
1374 case kS390_Mul64: | 1375 case kS390_Mul64: |
1375 if (HasRegisterInput(instr, 1)) { | 1376 if (HasRegisterInput(instr, 1)) { |
1376 __ Mul64(i.InputRegister(0), i.InputRegister(1)); | 1377 __ Mul64(i.InputRegister(0), i.InputRegister(1)); |
1377 } else if (HasImmediateInput(instr, 1)) { | 1378 } else if (HasImmediateInput(instr, 1)) { |
1378 __ Mul64(i.InputRegister(0), i.InputImmediate(1)); | 1379 __ Mul64(i.InputRegister(0), i.InputImmediate(1)); |
1379 } else if (HasStackSlotInput(instr, 1)) { | 1380 } else if (HasStackSlotInput(instr, 1)) { |
1380 __ Mul64(i.InputRegister(0), i.InputStackSlot(1)); | 1381 __ Mul64(i.InputRegister(0), i.InputStackSlot(1)); |
1381 } else { | 1382 } else { |
1382 UNIMPLEMENTED(); | 1383 UNIMPLEMENTED(); |
1383 } | 1384 } |
1384 break; | 1385 break; |
1385 case kS390_MulHigh32: | 1386 case kS390_MulHigh32: |
1386 __ LoadRR(r1, i.InputRegister(0)); | 1387 __ LoadRR(r1, i.InputRegister(0)); |
1387 if (HasRegisterInput(instr, 1)) { | 1388 if (HasRegisterInput(instr, 1)) { |
1388 __ mr_z(r0, i.InputRegister(1)); | 1389 __ mr_z(r0, i.InputRegister(1)); |
1389 } else if (HasStackSlotInput(instr, 1)) { | 1390 } else if (HasStackSlotInput(instr, 1)) { |
1390 #ifdef V8_TARGET_ARCH_S390X | 1391 __ mfy(r0, i.InputStackSlot32(1)); |
1391 // Avoid endian-issue here: | |
1392 // stg r1, 0(fp) | |
1393 // ... | |
1394 // mfy r2, 0(fp) <-- This will read the upper 32 bits | |
1395 __ lg(kScratchReg, i.InputStackSlot(1)); | |
1396 __ mr_z(r0, kScratchReg); | |
1397 #else | |
1398 __ mfy(r0, i.InputStackSlot(1)); | |
1399 #endif | |
1400 } else { | 1392 } else { |
1401 UNIMPLEMENTED(); | 1393 UNIMPLEMENTED(); |
1402 } | 1394 } |
1403 __ LoadW(i.OutputRegister(), r0); | 1395 __ LoadW(i.OutputRegister(), r0); |
1404 break; | 1396 break; |
1405 case kS390_Mul32WithHigh32: | 1397 case kS390_Mul32WithHigh32: |
1406 __ LoadRR(r1, i.InputRegister(0)); | 1398 __ LoadRR(r1, i.InputRegister(0)); |
1407 __ mr_z(r0, i.InputRegister(1)); | 1399 __ mr_z(r0, i.InputRegister(1)); |
1408 __ LoadW(i.OutputRegister(0), r1); // low | 1400 __ LoadW(i.OutputRegister(0), r1); // low |
1409 __ LoadW(i.OutputRegister(1), r0); // high | 1401 __ LoadW(i.OutputRegister(1), r0); // high |
1410 break; | 1402 break; |
1411 case kS390_MulHighU32: | 1403 case kS390_MulHighU32: |
1412 __ LoadRR(r1, i.InputRegister(0)); | 1404 __ LoadRR(r1, i.InputRegister(0)); |
1413 if (HasRegisterInput(instr, 1)) { | 1405 if (HasRegisterInput(instr, 1)) { |
1414 __ mlr(r0, i.InputRegister(1)); | 1406 __ mlr(r0, i.InputRegister(1)); |
1415 } else if (HasStackSlotInput(instr, 1)) { | 1407 } else if (HasStackSlotInput(instr, 1)) { |
1416 #ifdef V8_TARGET_ARCH_S390X | 1408 __ ml(r0, i.InputStackSlot32(1)); |
1417 // Avoid endian-issue here: | |
1418 // stg r1, 0(fp) | |
1419 // ... | |
1420 // mfy r2, 0(fp) <-- This will read the upper 32 bits | |
1421 __ lg(kScratchReg, i.InputStackSlot(1)); | |
1422 __ mlr(r0, kScratchReg); | |
1423 #else | |
1424 __ ml(r0, i.InputStackSlot(1)); | |
1425 #endif | |
1426 } else { | 1409 } else { |
1427 UNIMPLEMENTED(); | 1410 UNIMPLEMENTED(); |
1428 } | 1411 } |
1429 __ LoadlW(i.OutputRegister(), r0); | 1412 __ LoadlW(i.OutputRegister(), r0); |
1430 break; | 1413 break; |
1431 case kS390_MulFloat: | 1414 case kS390_MulFloat: |
1432 // Ensure we don't clobber right | 1415 // Ensure we don't clobber right |
1433 if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) { | 1416 if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) { |
1434 ASSEMBLE_FLOAT_UNOP(meebr); | 1417 ASSEMBLE_FLOAT_UNOP(meebr); |
1435 } else { | 1418 } else { |
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2577 padding_size -= 2; | 2560 padding_size -= 2; |
2578 } | 2561 } |
2579 } | 2562 } |
2580 } | 2563 } |
2581 | 2564 |
2582 #undef __ | 2565 #undef __ |
2583 | 2566 |
2584 } // namespace compiler | 2567 } // namespace compiler |
2585 } // namespace internal | 2568 } // namespace internal |
2586 } // namespace v8 | 2569 } // namespace v8 |
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