Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(517)

Unified Diff: src/mips/assembler-mips.cc

Issue 2535703002: MIPS: Optimize load/store with large offset on MIPSr6 (Closed)
Patch Set: Created 4 years, 1 month ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « no previous file | src/mips64/assembler-mips64.cc » ('j') | src/mips64/assembler-mips64.cc » ('J')
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: src/mips/assembler-mips.cc
diff --git a/src/mips/assembler-mips.cc b/src/mips/assembler-mips.cc
index 865e64c87d26fabb81a7511d774d1fb9b8440c60..8ce0754fcd497ee7a68a71c5512acf3aca99755b 100644
--- a/src/mips/assembler-mips.cc
+++ b/src/mips/assembler-mips.cc
@@ -1797,8 +1797,13 @@ int32_t Assembler::LoadRegPlusUpperOffsetPartToAt(const MemOperand& src) {
if (src.offset_ & kNegOffset) {
hi += 1;
}
- lui(at, hi);
- addu(at, at, src.rm());
+
+ if (IsMipsArchVariant(kMips32r6)) {
+ aui(at, src.rm(), hi);
+ } else {
+ lui(at, hi);
+ addu(at, at, src.rm());
+ }
return (src.offset_ & kImm16Mask);
}
« no previous file with comments | « no previous file | src/mips64/assembler-mips64.cc » ('j') | src/mips64/assembler-mips64.cc » ('J')

Powered by Google App Engine
This is Rietveld 408576698