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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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1933 emit(instr); | 1933 emit(instr); |
1934 } | 1934 } |
1935 | 1935 |
1936 | 1936 |
1937 // ------------Memory-instructions------------- | 1937 // ------------Memory-instructions------------- |
1938 | 1938 |
1939 // Helper for base-reg + offset, when offset is larger than int16. | 1939 // Helper for base-reg + offset, when offset is larger than int16. |
1940 void Assembler::LoadRegPlusOffsetToAt(const MemOperand& src) { | 1940 void Assembler::LoadRegPlusOffsetToAt(const MemOperand& src) { |
1941 DCHECK(!src.rm().is(at)); | 1941 DCHECK(!src.rm().is(at)); |
1942 DCHECK(is_int32(src.offset_)); | 1942 DCHECK(is_int32(src.offset_)); |
1943 lui(at, (src.offset_ >> kLuiShift) & kImm16Mask); | 1943 lui(at, (src.offset_ >> kLuiShift) & kImm16Mask); |
ivica.bogosavljevic
2016/11/28 13:13:46
Same remark as for MIPS32
Marija Antic
2016/11/28 13:36:12
Done.
| |
1944 ori(at, at, src.offset_ & kImm16Mask); // Load 32-bit offset. | 1944 ori(at, at, src.offset_ & kImm16Mask); // Load 32-bit offset. |
1945 daddu(at, at, src.rm()); // Add base register. | 1945 daddu(at, at, src.rm()); // Add base register. |
1946 } | 1946 } |
1947 | 1947 |
1948 // Helper for base-reg + upper part of offset, when offset is larger than int16. | 1948 // Helper for base-reg + upper part of offset, when offset is larger than int16. |
1949 // Loads higher part of the offset to AT register. | 1949 // Loads higher part of the offset to AT register. |
1950 // Returns lower part of the offset to be used as offset | 1950 // Returns lower part of the offset to be used as offset |
1951 // in Load/Store instructions | 1951 // in Load/Store instructions |
1952 int32_t Assembler::LoadRegPlusUpperOffsetPartToAt(const MemOperand& src) { | 1952 int32_t Assembler::LoadRegPlusUpperOffsetPartToAt(const MemOperand& src) { |
1953 DCHECK(!src.rm().is(at)); | 1953 DCHECK(!src.rm().is(at)); |
1954 DCHECK(is_int32(src.offset_)); | 1954 DCHECK(is_int32(src.offset_)); |
1955 int32_t hi = (src.offset_ >> kLuiShift) & kImm16Mask; | 1955 int32_t hi = (src.offset_ >> kLuiShift) & kImm16Mask; |
1956 // If the highest bit of the lower part of the offset is 1, this would make | 1956 // If the highest bit of the lower part of the offset is 1, this would make |
1957 // the offset in the load/store instruction negative. We need to compensate | 1957 // the offset in the load/store instruction negative. We need to compensate |
1958 // for this by adding 1 to the upper part of the offset. | 1958 // for this by adding 1 to the upper part of the offset. |
1959 if (src.offset_ & kNegOffset) { | 1959 if (src.offset_ & kNegOffset) { |
1960 if ((hi & kNegOffset) != ((hi + 1) & kNegOffset)) { | 1960 if ((hi & kNegOffset) != ((hi + 1) & kNegOffset)) { |
1961 LoadRegPlusOffsetToAt(src); | 1961 LoadRegPlusOffsetToAt(src); |
1962 return 0; | 1962 return 0; |
1963 } | 1963 } |
1964 | 1964 |
1965 hi += 1; | 1965 hi += 1; |
1966 } | 1966 } |
1967 | 1967 |
1968 lui(at, hi); | 1968 if (kArchVariant == kMips64r6) { |
1969 daddu(at, at, src.rm()); | 1969 daui(at, src.rm(), hi); |
1970 } else { | |
1971 lui(at, hi); | |
1972 daddu(at, at, src.rm()); | |
1973 } | |
1970 return (src.offset_ & kImm16Mask); | 1974 return (src.offset_ & kImm16Mask); |
1971 } | 1975 } |
1972 | 1976 |
1973 void Assembler::lb(Register rd, const MemOperand& rs) { | 1977 void Assembler::lb(Register rd, const MemOperand& rs) { |
1974 if (is_int16(rs.offset_)) { | 1978 if (is_int16(rs.offset_)) { |
1975 GenInstrImmediate(LB, rs.rm(), rd, rs.offset_); | 1979 GenInstrImmediate(LB, rs.rm(), rd, rs.offset_); |
1976 } else { // Offset > 16 bits, use multiple instructions to load. | 1980 } else { // Offset > 16 bits, use multiple instructions to load. |
1977 int32_t off16 = LoadRegPlusUpperOffsetPartToAt(rs); | 1981 int32_t off16 = LoadRegPlusUpperOffsetPartToAt(rs); |
1978 GenInstrImmediate(LB, at, rd, off16); | 1982 GenInstrImmediate(LB, at, rd, off16); |
1979 } | 1983 } |
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3505 | 3509 |
3506 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { | 3510 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { |
3507 Assembler::FlushICache(isolate, pc, 4 * Assembler::kInstrSize); | 3511 Assembler::FlushICache(isolate, pc, 4 * Assembler::kInstrSize); |
3508 } | 3512 } |
3509 } | 3513 } |
3510 | 3514 |
3511 } // namespace internal | 3515 } // namespace internal |
3512 } // namespace v8 | 3516 } // namespace v8 |
3513 | 3517 |
3514 #endif // V8_TARGET_ARCH_MIPS64 | 3518 #endif // V8_TARGET_ARCH_MIPS64 |
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