ARM64: Fix LCodeGen::ToOperand32.

ARM64: Fix LCodeGen::ToOperand32.

This fixes the following generated code sequence:
  movn w1, #0     // Synthesize -1.
  cmp w0, w1

With a properly-constructed Operand, the MacroAssembler can optimize it
as follows:
  cmn w0, #1

BUG=
R=ulan@chromium.org

Committed: https://code.google.com/p/v8/source/detail?r=20989

[ulan, 2014-04-25 09:08:18]

https://codereview.chromium.org/253513003/diff/1/src/arm64/lithium-codegen-ar...
File src/arm64/lithium-codegen-arm64.cc (right):

https://codereview.chromium.org/253513003/diff/1/src/arm64/lithium-codegen-ar...
src/arm64/lithium-codegen-arm64.cc:1239: return (signedness == SIGNED_INT32) ?
value : value & kWRegMask;
This will now generate 64-bit RelocInfo. Is this intended?

[jbramley, 2014-04-25 10:26:24]

On 2014/04/25 09:08:18, ulan wrote:
>
https://codereview.chromium.org/253513003/diff/1/src/arm64/lithium-codegen-ar...
> File src/arm64/lithium-codegen-arm64.cc (right):
> 
>
https://codereview.chromium.org/253513003/diff/1/src/arm64/lithium-codegen-ar...
> src/arm64/lithium-codegen-arm64.cc:1239: return (signedness == SIGNED_INT32) ?
> value : value & kWRegMask;
> This will now generate 64-bit RelocInfo. Is this intended?

No, it wasn't! I don't think there's any difference between NONE32 and NONE64
for arm64, but I'll fix it anyway.

[jbramley, 2014-04-25 13:54:32]

https://codereview.chromium.org/253513003/diff/1/src/arm64/lithium-codegen-ar...
File src/arm64/lithium-codegen-arm64.cc (right):

https://codereview.chromium.org/253513003/diff/1/src/arm64/lithium-codegen-ar...
src/arm64/lithium-codegen-arm64.cc:1239: return (signedness == SIGNED_INT32) ?
value : value & kWRegMask;
On 2014/04/25 09:08:18, ulan wrote:
> This will now generate 64-bit RelocInfo. Is this intended?

Done.

[ulan, 2014-04-25 14:00:36]

lgtm

[jbramley, 2014-04-25 14:08:29]

Committed patchset #2 manually as r20989 (presubmit successful).