| OLD | NEW |
| 1 // | 1 // |
| 2 // The Subzero Code Generator | 2 // The Subzero Code Generator |
| 3 // | 3 // |
| 4 // This file is distributed under the University of Illinois Open Source | 4 // This file is distributed under the University of Illinois Open Source |
| 5 // License. See LICENSE.TXT for details. | 5 // License. See LICENSE.TXT for details. |
| 6 // | 6 // |
| 7 //===----------------------------------------------------------------------===// | 7 //===----------------------------------------------------------------------===// |
| 8 /// | 8 /// |
| 9 /// \file | 9 /// \file |
| 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost | 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost |
| (...skipping 207 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 218 } | 218 } |
| 219 | 219 |
| 220 uint32_t TargetMIPS32::getStackAlignment() const { | 220 uint32_t TargetMIPS32::getStackAlignment() const { |
| 221 return MIPS32_STACK_ALIGNMENT_BYTES; | 221 return MIPS32_STACK_ALIGNMENT_BYTES; |
| 222 } | 222 } |
| 223 | 223 |
| 224 uint32_t TargetMIPS32::getCallStackArgumentsSizeBytes(const InstCall *Call) { | 224 uint32_t TargetMIPS32::getCallStackArgumentsSizeBytes(const InstCall *Call) { |
| 225 TargetMIPS32::CallingConv CC; | 225 TargetMIPS32::CallingConv CC; |
| 226 RegNumT DummyReg; | 226 RegNumT DummyReg; |
| 227 size_t OutArgsSizeBytes = 0; | 227 size_t OutArgsSizeBytes = 0; |
| 228 Variable *Dest = Call->getDest(); |
| 229 bool PartialOnStack = false; |
| 230 if (Dest != nullptr && isVectorFloatingType(Dest->getType())) { |
| 231 CC.discardReg(RegMIPS32::Reg_A0); |
| 232 // Next vector is partially on stack |
| 233 PartialOnStack = true; |
| 234 } |
| 228 for (SizeT i = 0, NumArgs = Call->getNumArgs(); i < NumArgs; ++i) { | 235 for (SizeT i = 0, NumArgs = Call->getNumArgs(); i < NumArgs; ++i) { |
| 229 Operand *Arg = legalizeUndef(Call->getArg(i)); | 236 Operand *Arg = legalizeUndef(Call->getArg(i)); |
| 230 const Type Ty = Arg->getType(); | 237 const Type Ty = Arg->getType(); |
| 231 RegNumT RegNum; | 238 RegNumT RegNum; |
| 232 if (CC.argInReg(Ty, i, &RegNum)) { | 239 if (CC.argInReg(Ty, i, &RegNum)) { |
| 240 // If PartialOnStack is true and if this is a vector type then last two |
| 241 // elements are on stack |
| 242 if (PartialOnStack && isVectorType(Ty)) { |
| 243 OutArgsSizeBytes = applyStackAlignmentTy(OutArgsSizeBytes, IceType_i32); |
| 244 OutArgsSizeBytes += typeWidthInBytesOnStack(IceType_i32) * 2; |
| 245 } |
| 233 continue; | 246 continue; |
| 234 } | 247 } |
| 235 | |
| 236 OutArgsSizeBytes = applyStackAlignmentTy(OutArgsSizeBytes, Ty); | 248 OutArgsSizeBytes = applyStackAlignmentTy(OutArgsSizeBytes, Ty); |
| 237 OutArgsSizeBytes += typeWidthInBytesOnStack(Ty); | 249 OutArgsSizeBytes += typeWidthInBytesOnStack(Ty); |
| 238 } | 250 } |
| 239 | 251 // Add size of argument save area |
| 252 constexpr int BytesPerStackArg = 4; |
| 253 OutArgsSizeBytes += MIPS32_MAX_GPR_ARG * BytesPerStackArg; |
| 240 return applyStackAlignment(OutArgsSizeBytes); | 254 return applyStackAlignment(OutArgsSizeBytes); |
| 241 } | 255 } |
| 242 | 256 |
| 243 namespace { | 257 namespace { |
| 244 inline uint64_t getConstantMemoryOrder(Operand *Opnd) { | 258 inline uint64_t getConstantMemoryOrder(Operand *Opnd) { |
| 245 if (auto *Integer = llvm::dyn_cast<ConstantInteger32>(Opnd)) | 259 if (auto *Integer = llvm::dyn_cast<ConstantInteger32>(Opnd)) |
| 246 return Integer->getValue(); | 260 return Integer->getValue(); |
| 247 return Intrinsics::MemoryOrderInvalid; | 261 return Intrinsics::MemoryOrderInvalid; |
| 248 } | 262 } |
| 249 } | 263 } |
| (...skipping 5712 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 5962 if (auto *CallTargetR = llvm::dyn_cast<Variable>(CallTarget)) { | 5976 if (auto *CallTargetR = llvm::dyn_cast<Variable>(CallTarget)) { |
| 5963 Variable *T6 = Target->getPhysicalRegister(RegMIPS32::Reg_T6); | 5977 Variable *T6 = Target->getPhysicalRegister(RegMIPS32::Reg_T6); |
| 5964 Target->_and(CallTargetR, CallTargetR, T6); | 5978 Target->_and(CallTargetR, CallTargetR, T6); |
| 5965 } | 5979 } |
| 5966 } | 5980 } |
| 5967 return Target->Context.insert<InstMIPS32Call>(ReturnReg, CallTarget); | 5981 return Target->Context.insert<InstMIPS32Call>(ReturnReg, CallTarget); |
| 5968 } | 5982 } |
| 5969 | 5983 |
| 5970 } // end of namespace MIPS32 | 5984 } // end of namespace MIPS32 |
| 5971 } // end of namespace Ice | 5985 } // end of namespace Ice |
| OLD | NEW |